DSPIC33EP128GS708 datasheet(228/484 Pages) MICROCHIP

228 / 484 page

dsPIC33EPXXXGS70X/80X FAMILY

DS70005258C-page 228

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U-0

—

bit 15

bit 8

U-0

R/W-0

—

—PTGQPTR<4:0>

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15-5

Unimplemented: Read as ‘0’

bit 4-0

PTGQPTR<4:0>: PTG Step Queue Pointer Register bits

This register points to the currently active Step command in the Step queue.

Note 1:

This register is read-only when the PTG module is executing Step commands (PTGEN = 1 and

PTGSTRT = 1).

R/W-0

STEP(2x + 1)<7:0>(2)

bit 15

bit 8

R/W-0

STEP(2x)<7:0>(2)

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15-8

STEP(2x + 1)<7:0>: PTG Step Queue Pointer Register bits(2)

A queue location for storage of the STEP(2x +1) command byte.

bit 7-0

STEP(2x)<7:0>: PTG Step Queue Pointer Register bits(2)

A queue location for storage of the STEP(2x) command byte.

Note 1:

This register is read-only when the PTG module is executing Step commands (PTGEN = 1 and

PTGSTRT = 1).

Refer to Table 17-1 for the Step command encoding.

The Step registers maintain their values on any type of Reset.

DSPIC33EP128GS708 Datasheet(PDF) 228 Page - Microchip Technology

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