DSPIC33EP128GS708 datasheet(234/484 Pages) MICROCHIP

234 / 484 page

dsPIC33EPXXXGS70X/80X FAMILY

DS70005258C-page 234

 2016-2018 Microchip Technology Inc.

To set up the SPIx module for the Standard Master

mode of operation:

If using interrupts:

Clear the interrupt flag bits in the respective

IFSx register.

Set the interrupt enable bits in the

respective IECx register.

Write the SPIxIP bits in the respective IPCx

Write the desired settings to the SPIxCON1L

and SPIxCON1H registers with the MSTEN bit

(SPIxCON1L<5>) = 1.

Clear the SPIROV bit (SPIxSTATL<6>).

Enable SPIx operation by setting the SPIEN bit

(SPIxCON1L<15>).

Write the data to be transmitted to the SPIxBUFL

and SPIxBUFH registers. Transmission (and

reception) will start as soon as data is written to

the SPIxBUFL and SPIxBUFH registers.

To set up the SPIx module for the Standard Slave mode

of operation:

Clear the SPIxBUF registers.

If using interrupts:

a) Clear the SPIxBUFL and SPIxBUFH

registers.

b) Set the interrupt enable bits in the

respective IECx register.

Write the SPIxIP bits in the respective IPCx

Write the desired settings to the SPIxCON1L,

SPIxCON1H and SPIxCON2L registers with

the MSTEN bit (SPIxCON1L<5>) = 0.

Clear the SMP bit.

If the CKE bit (SPIxCON1L<8>) is set, then the

SSEN bit (SPIxCON1L<7>) must be set to

enable the SSx pin.

Clear the SPIROV bit (SPIxSTATL<6>).

Enable SPIx operation by setting the SPIEN bit

(SPIxCON1L<15>).

FIGURE 18-1:

SPIx MODULE BLOCK DIAGRAM (STANDARD MODE)

Read

Write

Internal

Data Bus

SDIx

SDOx

SSx/FSYNC

SCKx

MSb

Shift

Control

Edge

Select

Enable Master Clock

Transmit

SPIxTXB

SPIxRXB

Peripheral Clock

REFO

MCLKEN

SPIxRXSR

URDTEN

TXELM<5:0> = 6’b0

MSb

Baud Rate

Generator

SSx & FSYNC

Control

Clock

Control

SPIxTXSR

Clock

Control

Edge

Select

Receive

SPIxURDT

DSPIC33EP128GS708 Datasheet(PDF) 234 Page - Microchip Technology

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