DSPIC33EP128GS708 datasheet(252/484 Pages) MICROCHIP

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dsPIC33EPXXXGS70X/80X FAMILY

DS70005258C-page 252

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bit 7

GCEN: General Call Enable bit (when operating as I2C slave)

1 = Enables interrupt when a general call address is received in I2CxRSR (module is enabled for reception)

0 = General call address is disabled

bit 6

STREN: SCLx Clock Stretch Enable bit (when operating as I2C slave)

Used in conjunction with the SCLREL bit.

1 = Enables software controlled clock stretching

0 = Disables software controlled clock stretching

bit 5

ACKDT: Acknowledge Data bit (when operating as I2C master, applicable during master receive)

Value that is transmitted when the software initiates an Acknowledge sequence.

1 = Sends NACK during Acknowledge

0 = Sends ACK during Acknowledge

bit 4

ACKEN: Acknowledge Sequence Enable bit

(when operating as I2C master, applicable during master receive)

1 = Initiates Acknowledge sequence on SDAx and SCLx pins and transmits ACKDT data bit; it is

cleared by hardware at the end of the master Acknowledge sequence

0 = Acknowledge sequence is not in progress

bit 3

RCEN: Receive Enable bit (when operating as I2C master)

1 = Enables Receive mode for I2C; it is cleared by hardware at the end of the eighth bit of the master

receive data byte

0 = Receive sequence is not in progress

bit 2

PEN: Stop Condition Enable bit (when operating as I2C master)

1 = Initiates Stop condition on SDAx and SCLx pins; it is cleared by hardware at the end of the master

Stop sequence

0 = Stop condition is not in progress

bit 1

RSEN: Repeated Start Condition Enable bit (when operating as I2C master)

1 = Initiates Repeated Start condition on SDAx and SCLx pins; it is cleared by hardware at the end of

the master Repeated Start sequence

0 = Repeated Start condition is not in progress

bit 0

SEN: Start Condition Enable bit (when operating as I2C master)

1 = Initiates Start condition on SDAx and SCLx pins; it is cleared by hardware at the end of the master

Start sequence

0 = Start condition is not in progress

I2CxCONL: I2Cx CONTROL REGISTER LOW (CONTINUED)

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