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DSPIC33EP128GS708 Datasheet(PDF) 291 Page - Microchip Technology |
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DSPIC33EP128GS708 Datasheet(HTML) 291 Page - Microchip Technology |
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291 / 484 page ![]() 2016-2018 Microchip Technology Inc. DS70005258C-page 291 dsPIC33EPXXXGS70X/80X FAMILY REGISTER 22-12: ADCORExH: DEDICATED ADC CORE x CONTROL REGISTER HIGH (x = 0 to 3)(1) U-0 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-1 R/W-1 — — — EISEL2 EISEL1 EISEL0 RES1 RES0 bit 15 bit 8 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 — ADCS<6:0> bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 15-13 Unimplemented: Read as ‘0’ bit 12-10 EISEL<2:0>: ADC Core x Early Interrupt Time Selection bits 111 = Early interrupt is set and an interrupt is generated eight TADCORE clocks prior to when the data is ready 110 = Early interrupt is set and an interrupt is generated seven TADCORE clocks prior to when the data is ready 101 = Early interrupt is set and an interrupt is generated six TADCORE clocks prior to when the data is ready 100 = Early interrupt is set and an interrupt is generated five TADCORE clocks prior to when the data is ready 011 = Early interrupt is set and an interrupt is generated four TADCORE clocks prior to when the data is ready 010 = Early interrupt is set and an interrupt is generated three TADCORE clocks prior to when the data is ready 001 = Early interrupt is set and an interrupt is generated two TADCORE clocks prior to when the data is ready 000 = Early interrupt is set and an interrupt is generated one TADCORE clock prior to when the data is ready bit 9-8 RES<1:0>: ADC Core x Resolution Selection bits 11 = 12-bit resolution 10 = 10-bit resolution 01 = 8-bit resolution 00 = 6-bit resolution bit 7 Unimplemented: Read as ‘0’ bit 6-0 ADCS<6:0>: ADC Core x Input Clock Divider bits These bits determine the number of Source Clock Periods (TCORESRC) for one Core Clock Period (TADCORE). 1111111 = 254 Source Clock Periods • • • 0000011 = 6 Source Clock Periods 0000010 = 4 Source Clock Periods 0000001 = 2 Source Clock Periods 0000000 = 2 Source Clock Periods Note 1: For the 6-bit ADC core resolution (RES<1:0> = 00), the EISEL<2:0> bits settings, from ‘100’ to ‘111’, are not valid and should not be used. For the 8-bit ADC core resolution (RES<1:0> = 01), the EISEL<2:0> bits settings, ‘110’ and ‘111’, are not valid and should not be used. |
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