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DSPIC33EP128GS708 Datasheet(PDF) 303 Page - Microchip Technology |
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DSPIC33EP128GS708 Datasheet(HTML) 303 Page - Microchip Technology |
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303 / 484 page  2016-2018 Microchip Technology Inc. DS70005258C-page 303 dsPIC33EPXXXGS70X/80X FAMILY REGISTER 22-28: ADCAL0L: ADC CALIBRATION REGISTER 0 LOW HSC/R-0 U-0 U-0 U-0 r-0 R/W-0 R/W-0 R/W-0 CAL1RDY — — — — CAL1DIFF CAL1EN CAL1RUN bit 15 bit 8 HSC/R-0 U-0 U-0 U-0 r-0 R/W-0 R/W-0 R/W-0 CAL0RDY — — — — CAL0DIFF CAL0EN CAL0RUN bit 7 bit 0 Legend: r = Reserved bit U = Unimplemented bit, read as ‘0’ R = Readable bit W = Writable bit HSC = Hardware Settable/Clearable bit -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 15 CAL1RDY: Dedicated ADC Core 1 Calibration Status Flag bit 1 = Dedicated ADC Core 1 calibration is finished 0 = Dedicated ADC Core 1 calibration is in progress bit 14-12 Unimplemented: Read as ‘0’ bit 11 Reserved: Maintain as ‘0’ bit 10 CAL1DIFF: Dedicated ADC Core 1 Differential-Mode Calibration bit 1 = Dedicated ADC Core 1 will be calibrated in Differential Input mode 0 = Dedicated ADC Core 1 will be calibrated in Single-Ended Input mode bit 9 CAL1EN: Dedicated ADC Core 1 Calibration Enable bit 1 = Dedicated ADC Core 1 calibration bits (CALxRDY, CALxDIFF and CALxRUN) can be accessed by software 0 = Dedicated ADC Core 1 calibration bits are disabled bit 8 CAL1RUN: Dedicated ADC Core 1 Calibration Start bit 1 = If this bit is set by software, the dedicated ADC Core 1 calibration cycle is started; this bit is automatically cleared by hardware 0 = Software can start the next calibration cycle bit 7 CAL0RDY: Dedicated ADC Core 0 Calibration Status Flag bit 1 = Dedicated ADC Core 0 calibration is finished 0 = Dedicated ADC Core 0 calibration is in progress bit 6-4 Unimplemented: Read as ‘0’ bit 3 Reserved: Maintain as ‘0’ bit 2 CAL0DIFF: Dedicated ADC Core 0 Differential-Mode Calibration bit 1 = Dedicated ADC Core 0 will be calibrated in Differential Input mode 0 = Dedicated ADC Core 0 will be calibrated in Single-Ended Input mode bit 1 CAL0EN: Dedicated ADC Core 0 Calibration Enable bit 1 = Dedicated ADC Core 0 calibration bits (CALxRDY, CALxDIFF and CALxRUN) can be accessed by software 0 = Dedicated ADC Core 0 calibration bits are disabled bit 0 CAL0RUN: Dedicated ADC Core 0 Calibration Start bit 1 = If this bit is set by software, the dedicated ADC Core 0 calibration cycle is started; this bit is automatically cleared by hardware 0 = Software can start the next calibration cycle |
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