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DSPIC33EP128GS708 Datasheet(PDF) 304 Page - Microchip Technology |
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DSPIC33EP128GS708 Datasheet(HTML) 304 Page - Microchip Technology |
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304 / 484 page  dsPIC33EPXXXGS70X/80X FAMILY DS70005258C-page 304 2016-2018 Microchip Technology Inc. REGISTER 22-29: ADCAL0H: ADC CALIBRATION REGISTER 0 HIGH HSC/R-0 U-0 U-0 U-0 r-0 R/W-0 R/W-0 R/W-0 CAL3RDY — — — — CAL3DIFF CAL3EN CAL3RUN bit 15 bit 8 HSC/R-0 U-0 U-0 U-0 r-0 R/W-0 R/W-0 R/W-0 CAL2RDY — — — — CAL2DIFF CAL2EN CAL2RUN bit 7 bit 0 Legend: r = Reserved bit U = Unimplemented bit, read as ‘0’ R = Readable bit W = Writable bit HSC = Hardware Settable/Clearable bit -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 15 CAL3RDY: Dedicated ADC Core 3 Calibration Status Flag bit 1 = Dedicated ADC Core 3 calibration is finished 0 = Dedicated ADC Core 3 calibration is in progress bit 14-12 Unimplemented: Read as ‘0’ bit 11 Reserved: Maintain as ‘0’ bit 10 CAL3DIFF: Dedicated ADC Core 3 Differential-Mode Calibration bit 1 = Dedicated ADC Core 3 will be calibrated in Differential Input mode 0 = Dedicated ADC Core 3 will be calibrated in Single-Ended Input mode bit 9 CAL3EN: Dedicated ADC Core 3 Calibration Enable bit 1 = Dedicated ADC Core 3 calibration bits (CALxRDY, CALxDIFF and CALxRUN) can be accessed by software 0 = Dedicated ADC Core 3 calibration bits are disabled bit 8 CAL3RUN: Dedicated ADC Core 3 Calibration Start bit 1 = If this bit is set by software, the dedicated ADC Core 3 calibration cycle is started; this bit is automatically cleared by hardware 0 = Software can start the next calibration cycle bit 7 CAL2RDY: Dedicated ADC Core 2 Calibration Status Flag bit 1 = Dedicated ADC Core 2 calibration is finished 0 = Dedicated ADC Core 2 calibration is in progress bit 6-4 Unimplemented: Read as ‘0’ bit 3 Reserved: Maintain as ‘0’ bit 2 CAL2DIFF: Dedicated ADC Core 2 Differential-Mode Calibration bit 1 = Dedicated ADC Core 2 will be calibrated in Differential Input mode 0 = Dedicated ADC Core 2 will be calibrated in Single-Ended Input mode bit 1 CAL2EN: Dedicated ADC Core 2 Calibration Enable bit 1 = Dedicated ADC Core 2 calibration bits (CALxRDY, CALxDIFF and CALxRUN) can be accessed by software 0 = Dedicated ADC Core 2 calibration bits are disabled bit 0 CAL2RUN: Dedicated ADC Core 2 Calibration Start bit 1 = If this bit is set by software, the dedicated ADC Core 2 calibration cycle is started; this bit is automatically cleared by hardware 0 = Software can start the next calibration cycle |
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