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DSPIC33EP128GS708 Datasheet(PDF) 475 Page - Microchip Technology |
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DSPIC33EP128GS708 Datasheet(HTML) 475 Page - Microchip Technology |
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475 / 484 page  2016-2018 Microchip Technology Inc. DS70005258C-page 475 dsPIC33EPXXXGS70X/80X FAMILY CxBUFPNT3 (CANx Filters 8-11 Buffer Pointer 3)................................................ 323 CxBUFPNT4 (CANx Filters 12-15 Buffer Pointer 4)................................................ 324 CxCFG1 (CANx Baud Rate Configuration 1)............ 320 CxCFG2 (CANx Baud Rate Configuration 2)............ 321 CxCTRL1 (CANx Control 1)...................................... 313 CxCTRL2 (CANx Control 2)...................................... 314 CxEC (CANx Transmit/Receive Error Count) ........... 320 CxFCTRL (CANx FIFO Control) ............................... 316 CxFEN1 (CANx Acceptance Filter Enable 1)............ 322 CxFIFO (CANx FIFO Status) .................................... 317 CxFMSKSEL1 (CANx Filters 7-0 Mask Selection 1) ............................................. 326 CxFMSKSEL2 (CANx Filters 15-8 Mask Selection 2) ............................................. 327 CxINTE (CANx Interrupt Enable) .............................. 319 CxINTF (CANx Interrupt Flag) .................................. 318 CxRXFnEID (CANx Acceptance Filter n Extended Identifier)........................................... 325 CxRXFnSID (CANx Acceptance Filter n Standard Identifier) ........................................... 325 CxRXFUL1 (CANx Receive Buffer Full 1)................. 329 CxRXFUL2 (CANx Receive Buffer Full 2)................. 329 CxRXMnEID (CANx Acceptance Filter Mask n Extended Identifier)........................................... 328 CxRXMnSID (CANx Acceptance Filter Mask n Standard Identifier) ........................................... 328 CxRXOVF1 (CANx Receive Buffer Overflow 1)........ 330 CxRXOVF2 (CANx Receive Buffer Overflow 2)........ 330 CxTRmnCON (CANx TX/RX Buffer mn Control) ...... 331 CxVEC (CANx Interrupt Code) ................................. 315 DEVID (Device ID) .................................................... 358 DEVREV (Device Revision) ...................................... 358 DMALCA (DMA Last Channel Active Status) ........... 102 DMAPPS (DMA Ping-Pong Status) .......................... 103 DMAPWC (DMA Peripheral Write Collision Status)................................................ 100 DMARQC (DMA Request Collision Status) .............. 101 DMAxCNT (DMA Channel x Transfer Count) ............. 98 DMAxCON (DMA Channel x Control) ......................... 94 DMAxPAD (DMA Channel x Peripheral Address)....... 98 DMAxREQ (DMA Channel x IRQ Select) ................... 95 DMAxSTAH (DMA Channel x Start Address A, High) ........................................ 96 DMAxSTAL (DMA Channel x Start Address A, Low)......................................... 96 DMAxSTBH (DMA Channel x Start Address B, High) ........................................ 97 DMAxSTBL (DMA Channel x Start Address B, Low)......................................... 97 DSADRH (DMA Most Recent RAM High Address)..... 99 DSADRL (DMA Most Recent RAM Low Address) ...... 99 DTRx (PWMx Dead-Time) ........................................ 205 FCLCONx (PWMx Fault Current-Limit Control) ........ 209 I2CxCONH (I2Cx Control High) ................................ 253 I2CxCONL (I2Cx Control Low).................................. 251 I2CxMSK (I2Cx Slave Mode Address Mask) ............ 256 I2CxSTAT (I2Cx Status) ........................................... 254 ICxCON1 (Input Capture x Control 1) ....................... 180 ICxCON2 (Input Capture x Control 2) ....................... 181 INTCON1 (Interrupt Control 1).................................... 86 INTCON2 (Interrupt Control 2).................................... 88 INTCON3 (Interrupt Control 3).................................... 89 INTCON4 (Interrupt Control 4).................................... 89 INTTREG (Interrupt Control and Status) .................... 90 IOCONx (PWMx I/O Control).................................... 207 ISRCCON (Constant-Current Source Control) ......... 350 LATx (PORTx Data Latch)........................................ 134 LEBCONx (PWMx Leading-Edge Blanking Control) .............................................. 212 LEBDLYx (PWMx Leading-Edge Blanking Delay) ................................................ 213 LFSR (Linear Feedback Shift) .................................. 116 MDC (PWM Master Duty Cycle)............................... 199 NVMADR (Nonvolatile Memory Lower Address)........ 69 NVMADRU (Nonvolatile Memory Upper Address) ..... 69 NVMCON (Nonvolatile Memory (NVM) Control) ........ 67 NVMKEY (Nonvolatile Memory Key) .......................... 70 NVMSRCADR (NVM Source Data Address).............. 70 OCxCON1 (Output Compare x Control 1) ................ 184 OCxCON2 (Output Compare x Control 2) ................ 186 ODCx (PORTx Open-Drain Control) ........................ 134 OSCCON (Oscillator Control)................................... 109 OSCTUN (FRC Oscillator Tuning)............................ 113 PDCx (PWMx Generator Duty Cycle)....................... 202 PGAxCAL (PGAx Calibration) .................................. 348 PGAxCON (PGAx Control)....................................... 347 PHASEx (PWMx Primary Phase-Shift)..................... 203 PLLFBD (PLL Feedback Divisor) ............................. 112 PMD1 (Peripheral Module Disable Control 1) .......... 120 PMD2 (Peripheral Module Disable Control 2) .......... 122 PMD3 (Peripheral Module Disable Control 3) .......... 123 PMD4 (Peripheral Module Disable Control 4) .......... 123 PMD6 (Peripheral Module Disable Control 6) .......... 124 PMD7 (Peripheral Module Disable Control 7) .......... 125 PMD8 (Peripheral Module Disable Control 8) .......... 126 PORTx (I/O PORTx)................................................. 133 PTCON (PWM Time Base Control) .......................... 193 PTCON2 (PWM Clock Divider Select)...................... 194 PTGADJ (PTG Adjust).............................................. 227 PTGBTE (PTG Broadcast Trigger Enable)............... 222 PTGC0LIM (PTG Counter 0 Limit) ........................... 225 PTGC1LIM (PTG Counter 1 Limit) ........................... 226 PTGCON (PTG Control)........................................... 221 PTGCST (PTG Control/Status) ................................ 219 PTGHOLD (PTG Hold) ............................................. 226 PTGL0 (PTG Literal 0).............................................. 227 PTGQPTR (PTG Step Queue Pointer)..................... 228 PTGQUEx (PTG Step Queue x)............................... 228 PTGSDLIM (PTG Step Delay Limit) ......................... 225 PTGT0LIM (PTG Timer0 Limit) ................................ 224 PTGT1LIM (PTG Timer1 Limit) ................................ 224 PTPER (PWM Primary Master Time Base Period)............................................ 195 PWMCAPx (PWMx Primary Time Base Capture) ......................................... 215 PWMCONx (PWMx Control) .................................... 200 PWMKEY (PWM Protection Lock/Unlock Key) ........ 199 RCON (Reset Control)................................................ 73 REFOCON (Reference Oscillator Control) ............... 115 RPINR0 (Peripheral Pin Select Input 0) ................... 144 RPINR1 (Peripheral Pin Select Input 1) ................... 144 RPINR11 (Peripheral Pin Select Input 11) ............... 147 RPINR12 (Peripheral Pin Select Input 12) ............... 147 RPINR13 (Peripheral Pin Select Input 13) ............... 148 RPINR18 (Peripheral Pin Select Input 18) ............... 148 RPINR19 (Peripheral Pin Select Input 19) ............... 149 RPINR2 (Peripheral Pin Select Input 2) ................... 145 RPINR20 (Peripheral Pin Select Input 20) ............... 149 |
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