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DSPIC33EP128GS708 Datasheet(PDF) 477 Page - Microchip Technology |
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DSPIC33EP128GS708 Datasheet(HTML) 477 Page - Microchip Technology |
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477 / 484 page ![]() 2016-2018 Microchip Technology Inc. DS70005258C-page 477 dsPIC33EPXXXGS70X/80X FAMILY Timing Diagrams BOR and Master Clear Reset Characteristics .......... 395 CANx I/O................................................................... 430 External Clock........................................................... 392 High-Speed PWMx Fault Characteristics.................. 401 High-Speed PWMx Module Characteristics.............. 401 I/O Characteristics .................................................... 395 I2Cx Bus Data (Master Mode) .................................. 426 I2Cx Bus Data (Slave Mode) .................................... 428 I2Cx Bus Start/Stop Bits (Master Mode) ................... 426 I2Cx Bus Start/Stop Bits (Slave Mode) ..................... 428 Input Capture x (ICx) Characteristics........................ 399 OCx/PWMx Characteristics ...................................... 400 Output Compare x (OCx) Characteristics ................. 400 SPI1, SPI2 and SPI3 Master Mode (Full-Duplex, CKE = 0, CKP = x, SMP = 1) ............................ 405 SPI1, SPI2 and SPI3 Master Mode (Full-Duplex, CKE = 1, CKP = x, SMP = 1) ............................ 404 SPI1, SPI2 and SPI3 Master Mode (Half-Duplex, Transmit Only, CKE = 0)................................... 402 SPI1, SPI2 and SPI3 Master Mode (Half-Duplex, Transmit Only, CKE = 1)................................... 403 SPI1, SPI2 and SPI3 Slave Mode (Full-Duplex, CKE = 0, CKP = 0, SMP = 0)............................ 412 SPI1, SPI2 and SPI3 Slave Mode (Full-Duplex, CKE = 0, CKP = 1, SMP = 0)............................ 410 SPI1, SPI2 and SPI3 Slave Mode (Full-Duplex, CKE = 1, CKP = 0, SMP = 0)............................ 406 SPI1, SPI2 and SPI3 Slave Mode (Full-Duplex, CKE = 1, CKP = 1, SMP = 0)............................ 408 SPI3 Master Mode (Full-Duplex, CKE = 0, CKP = x, SMP = 1) ........................................... 417 SPI3 Master Mode (Full-Duplex, CKE = 1, CKP = x, SMP = 1) ........................................... 416 SPI3 Master Mode (Half-Duplex, Transmit Only, CKE = 0)................................... 414 SPI3 Master Mode (Half-Duplex, Transmit Only, CKE = 1)................................... 415 SPI3 Slave Mode (Full-Duplex, CKE = 0, CKP = 0, SMP = 0) ........................................... 424 SPI3 Slave Mode (Full-Duplex, CKE = 0, CKP = 1, SMP = 0) ........................................... 422 SPI3 Slave Mode (Full-Duplex, CKE = 1, CKP = 0, SMP = 0) ........................................... 418 SPI3 Slave Mode (Full-Duplex, CKE = 1, CKP = 1, SMP = 0) ........................................... 420 Timer1-Timer5 External Clock Characteristics ......... 397 UARTx I/O Characteristics........................................ 431 U UART Unique Device Identifier (UDID) ......................................... 34 Universal Asynchronous Receiver Transmitter (UART) .................................................. 257 Control Registers...................................................... 259 Helpful Tips............................................................... 258 Resources ................................................................ 258 Universal Asynchronous Receiver Transmitter. See UART. User OTP Memory............................................................ 359 V Voltage Regulator (On-Chip) ............................................ 359 W Watchdog Timer (WDT)............................................ 351, 360 Programming Considerations ................................... 360 WWW Address ................................................................. 478 WWW, On-Line Support ..................................................... 10 |
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