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DLPA2005 Datasheet(PDF) 8 Page - Texas Instruments |
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DLPA2005 Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 60 page  (4) When VCC_INTF is powered and VDD is not powered, the controller may drive the IIC0_xxx pins low which prevents communication on this I2C bus. Do not power up the VCC_INTF pin before powering up the VDD pin for any system that has additional slave devices on this bus. Table 5-7. GPIO Peripheral Interface(1) PIN(1) I/O TYPE(3) DESCRIPTION(2) NAME NO. GPIO_19 M15 I/O 1 General purpose I/O 19 (hysteresis buffer). Optional GPIO. If unused TI recommends this pin be configured as a logic zero GPIO output and left unconnected. Otherwise this pin requires an external pullup or pulldown to avoid a floating GPIO input. GPIO_18 M14 I/O 1 General purpose I/O 18 (hysteresis buffer). Optional GPIO. If unused TI recommends this pin be configured as a logic zero GPIO output and left unconnected. Otherwise this pin requires an external pullup or pulldown to avoid a floating GPIO input. GPIO_17 L15 I/O 1 General purpose I/O 17 (hysteresis buffer). Optional GPIO. If unused TI recommends this pin be configured as a logic zero GPIO output and left unconnected. Otherwise this pin requires an external pullup or pulldown to avoid a floating GPIO input. GPIO_16 L14 I/O 1 General purpose I/O 16 (hysteresis buffer). Optional GPIO. If unused TI recommends this pin be configured as a logic zero GPIO output and left unconnected. Otherwise this pin requires an external pullup or pulldown to avoid a floating GPIO input. GPIO_15 K15 I/O 1 General purpose I/O 15 (hysteresis buffer). Optional GPIO. If unused TI recommends this pin be configured as a logic zero GPIO output and left unconnected. Otherwise this pin requires an external pullup or pulldown to avoid a floating GPIO input. GPIO_14 K14 I/O 1 General purpose I/O 14 (hysteresis buffer). FPGA_RDY (input): Input from FPGA, indicating when the FPGA initialization process is complete. GPIO_13 J15 I/O 1 General purpose I/O 13 (hysteresis buffer). AWG_ERR (input): Input from FPGA, indicating instability in actuator operation in order to halt printing and recover. GPIO_12 J14 I/O 1 General purpose I/O 12 (hysteresis buffer). Optional GPIO. If unused TI recommends this pin be configured as a logic zero GPIO output and left unconnected. Otherwise this pin requires an external pullup or pulldown to avoid a floating GPIO input. GPIO_11 H15 I/O 1 General purpose I/O 11 (hysteresis buffer). Options: 1. Thermistor power enable (output). Turns on the power to the thermistor when it is used and enabled. 2. Optional GPIO. If unused TI recommends this pin be configured as a logic zero GPIO output and left unconnected. Otherwise this pin requires an external pullup or pulldown to avoid a floating GPIO input. GPIO_10 H14 I/O 1 General Purpose I/O 10 (hysteresis buffer). Options: 1. RC_CHARGE (output): Intended to feed the RC charge circuit of the thermistor interface. 2. Optional GPIO. If unused TI recommends this pin be configured as a logic zero GPIO output and left unconnected. Otherwise this pin requires an external pullup or pulldown to avoid a floating GPIO input. GPIO_09 G15 I/O 1 General purpose I/O 09 (hysteresis buffer). Reserved for Print Active signal. Indicates that a layer is actively being printed with previously sent print layer command. Applicable to External Print Mode only. GPIO_08 G14 I/O 1 General purpose I/O 08 (hysteresis buffer). Normal mirror parking request (active low): To be driven by the PROJ_ON output of the host. A logic low on this signal causes the DLPC1438 to PARK the DMD, but it does not power down the DMD (the DLPAxxxx does that instead). The minimum high time is 200 ms. The minimum low time is 200 ms. GPIO_07 F15 I/O 1 General purpose I/O 07 (hysteresis buffer). ACT_SYNC (output): Output to FPGA, used for synchronizing the actuator position with the controller data processing. GPIO_06 F14 I/O 1 General purpose I/O 06 (hysteresis buffer). Reserved for System Ready signal (Output). Indicates when system is configured and ready for first print layer command after being commanded to go into External Print Mode. Applicable to External Print Mode only. GPIO_05 E15 I/O 1 General purpose I/O 05 (hysteresis buffer). Optional GPIO. If unused TI recommends this pin be configured as a logic zero GPIO output and left unconnected. Otherwise this pin requires an external pullup or pulldown to avoid a floating GPIO input. DLPC1438 DLPS216A – JULY 2021 – REVISED AUGUST 2021 www.ti.com 8 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: DLPC1438 |
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