LTC3889 datasheet(32/118 Pages) AD

32 / 118 page

LTC3888/LTC3888-1/

LTC3888-2

Rev. B

For more information www.analog.com

OPERATION

External Faults

There are no hardware-level responses to any external

faults propagated into the IC through the FAULT pins.

HIGHER-LEVEL FAULT HANDLING

Higher-level input and output fault event handling

(response) can be programmed as described in the fol-

lowing PMBus Command Details section. Once a fault is

detected, several tens of microseconds may be required

for these higher level responses to occur, including related

assertion of a FAULT output. Time filtering programmed

in any specific fault response will be in addition to these

normal processing delays. For many faults, the LTC3888

can manage response in one of three ways: ignore, auton-

omous recovery (hiccup), or latch off. The device takes no

additional action beyond previously discussed hardware-

level responses when programmed to ignore a fault.

For autonomous recovery a new soft-start is attempted if

the fault condition is not present after the MFR_RETRY_

DELAY interval has elapsed. MFR_RETRY_DELAY can

be set from 120ms to 83 seconds in 1ms increments.

If the fault persists, the controller will continue to retry

with an interval specified by MFR_RETRY_DELAY. This

avoids damage to external regulator components caused

by repetitive, rapid power cycling.

No retry is attempted for a latch off fault response. In the

latch off state the applicable external power stages are

immediately disabled to stop the transfer of energy to

the load as quickly as possible. The output remains dis-

abled until the master channel is commanded off and then

on, or IC supply power is cycled. Commanding a PWM

channel off and on may require software and/or hardware

intervention depending on its programmed configuration.

The RUN pin must be released by any controlling exter-

nal application circuits for that channel to restart from

the latch off state. As the RUN pin for a given rail rises,

associated internal fault indications are cleared automati-

cally. The LTC3888 can also be programmed to clear faults

for both master channels based solely on the run state of

just one channel. See the MFR_CONFIG_ALL command.

CLEAR_FAULTS can also be used to clear all fault bits at

any time, independent of PWM channel state.

Higher-level handling of some internally generated faults

can be digitally deglitched. External faults propagated into

the chip using FAULT pins are not deglitched. Refer to the

following section on FAULT Pin I/O.

STATUS REGISTERS AND ALERT MASKING

Figure 2 summarizes the internal LTC3888 status reg-

isters accessible by PMBus command. These contain

indication of various faults, warnings and other impor-

tant operating conditions. As shown, STATUS_BYTE and

STATUS_WORD also summarize contents of other status

registers. Refer to PMBus Command Details for specific

information.

NONE OF THE ABOVE in STATUS_BYTE indicates that

one or more of the bits in the most-significant nibble of

STATUS_WORD are also set.

Figure 2 also shows which of the status bits will assert

ALERT if set and not masked. Once set, ALERT will remain

low until one of the following occurs.

• A CLEAR_FAULTS, RESTORE_USER_ALL or MFR_

RESET Command Is Issued

• The Related Status Bit Is Written to a One

• The Faulted Channel Is Properly Commanded Off and

Back On

• The LTC3888 Successfully Transmits Its Address

During a PMBus Alert Response Address (ARA)

• IC Supply Power Is Cycled

With some exceptions, the SMBALERT_MASK command

can be used to prevent the LTC3888 from asserting ALERT

on a bit-by-bit basis by register. These mask settings are

promoted to STATUS_WORD and STATUS_BYTE in the

same fashion as the status bits themselves. For example,

if ALERT is masked for all bits in Channel 0 STATUS_

VOUT, then ALERT is effectively masked for the VOUT bit

in STATUS_WORD for PAGE 0.

LTC3889 Datasheet(PDF) 32 Page - Analog Devices

LTC3889 Datasheet(HTML) 32 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL