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LTC3889 Datasheet(PDF) 84 Page - Analog Devices |
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LTC3889 Datasheet(HTML) 84 Page - Analog Devices |
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84 / 118 page ![]() LTC3888/LTC3888-1/ LTC3888-2 84 Rev. B For more information www.analog.com PMBus COMMAND DETAILS (PWM Configuration) Bit Definitions BIT MEANING 7 (Reserved, must write as 0) 6 Slave IOUT Telemetry: 0: The LTC3888-1 provides continuous IOUT telemetry for all enabled phases. 1: The LTC3888-1 only provides IOUT telemetry for master channels PWM0 and PWM1. 5 SPI Logic Level (LTC3888 Only): 0: The LTC3888 SPI Interface uses SMBus 2.0V Input Logic Levels. 1: The LTC3888 SPI Interface uses 1.8V CMOS Input Logic Levels. 4 VOUT_OV_FAULT HW Response: 0: No special low level response, master phase obeys VOUT_OV_FAULT_RESPONSE of immediate off (PWM Hi-Z). 1: PWM of master phase driven low during VOUT_OV_FAULT, synchronous bottom power FET attempts to discharge VOUT with rail off. 3 Phase Expansion: 0: The power-good state for Channel 0 is output on PGOOD0. 1: A phase expansion clock (CLKOUT) is output on PGOOD0 to drive SYNC on a second LTC3888-1. [2:0] Value Master/Slave Configuration Master Configuration / Slave Phase (*) 111 PWM0 7-Phase 0 PWM0 PWM2 51.4 PWM0 PWM3 154.3 PWM0 PWM4 205.7 PWM0 PWM5 102.9 PWM0 PWM6 257.1 PWM0 PWM7 308.6 PWM1 1-Phase 25.7 110 PWM0 (6-Phase) 0 PWM0 PWM2 60 PWM0 PWM3 180 PWM0 PWM4 240 PWM0 PWM5 120 PWM0 PWM6 300 PWM1 (2-Phase) 30 PWM1 PWM7 210 101 PWM0 (6-Phase) 0 PWM0 PWM2 60 PWM0 PWM3 180 PWM0 PWM4 240 PWM0 PWM5 120 PWM0 PWM6 300 PWM1 (1-Phase) 30 PWM7 Off |
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