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LTC3889 Datasheet(PDF) 67 Page - Analog Devices |
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LTC3889 Datasheet(HTML) 67 Page - Analog Devices |
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67 / 118 page ![]() LTC3888/LTC3888-1/ LTC3888-2 67 Rev. B For more information www.analog.com APPLICATIONS INFORMATION RESISTOR CONFIGURATION PINS As a factory default, the LTC3888 is programmed to use external resistor configuration, allowing output voltage (LTC3888/3888-2), output current limit (LTC3888-1), PWM frequency and phasing, and the PMBus address to be set without programming the part through its serial interface or purchasing devices with custom EEPROM contents. An 18.7kΩ resistor with a tolerance of 1% or better must be wired between the RSET pin and GND. This component establishes the correct bias level for the Figure 43. Normalized RMS Input Ripple Current 0 0.1 0.2 0.3 0.4 388812 F43 0.5 0.6 DUTY FACTOR (VOUT/VIN) 0.1 0.3 0.5 0.6 0.2 0.4 0.7 0.8 0.9 1-PHASE 2-PHASE DUTY FACTOR (VOUT/VIN) 0.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0.3 0.5 0.6 388812 F44 0.2 0.4 0.7 0.8 0.9 1-PHASE 2-PHASE Figure 44. Normalized Output Ripple Current remaining RCONFIG pins, which are programmed with a resistor to GND. The RCONFIG pins are only interrogated at initial power up and during a reset, so modifying their values on the fly is not recommended. RCONFIG pins on the same IC can share a single resistor if they require identical programming. Resistors with a tolerance of 1% or better must be used to assure proper operation. Noisy clock signals should not be routed near these pins. Output voltage (LTC3888/3888-2), or output current limit (LTC3888-1) can be set as shown in Table 10. For exam- ple, setting this resistor to 4.42kΩ is equivalent to pro- gramming a IOUT_OC_WARN_LIMIT value of 32A with IOUT_OC_FAULT_LIMIT set to 40A for the (LTC3888-1). Any of the single-IC master/slave configurations that the LTC3888 supports can be programmed with PWM_CFG using one of two frequencies as shown in Table 11. Phase expansion is not supported when using an external resis- tor to set master/slave configuration. The LTC3888 address is selected based on the program- ming of the two configuration pins ASEL0 and ASEL1 according to Table 12. ASEL0 programs the bottom four bits of the device address for the LTC3888, and ASEL1 programs the three most-significant bits. Either portion of the address can also be retrieved from the MFR_ ADDRESS value in EEPROM. If both pins are left open, the full 7-bit MFR_ADDRESS value stored in EEPROM is used to determine the device address. It is recommended that each LTC3888 in a system have a unique address, and the ASEL pins provide an efficient way to accomplish this without a plethora of custom EEPPOM programming. The LTC3888 also responds to 7-bit global addresses 0x5A and 0x5B. MFR_ADDRESS and MFR_RAIL_ADDRESS should not be set to either of these values. |
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