CS48L32 datasheet(52/192 Pages) CIRRUS

52 / 192 page

Cirrus Logic

DS1219F4

CS48L32

4.3 Digital Core

The following description of the DRC is applicable to each DRC. The associated control fields are described in Table 4-15

and Table 4-16 for DRC1 and DRC2 respectively.

4.3.5.1

DRC Compression, Expansion, and Limiting

The DRC supports two different compression regions, separated by a knee at a specific input amplitude (shown as Knee 1

in Fig. 4-20). In the region above the knee, the compression slope DRCn_HI_COMP applies; in the region below the knee,

the compression slope DRCn_LO_COMP applies. Note that n identifies the applicable DRC 1 or 2.

The DRC also supports a noise-gate region, where low-level input signals are heavily attenuated. This function can be

enabled or disabled according to the application requirements. The DRC response in this region is defined by the

expansion slope DRCn_NG_EXP.

For additional attenuation of signals in the noise-gate region, an additional knee can be defined (shown as Knee 2 in

Fig. 4-20). If this knee is enabled, there is an infinitely steep drop-off in the DRC response pattern between the DRCn_

LO_COMP and DRCn_NG_EXP regions.

The overall DRC compression characteristic in steady state (i.e., where the input amplitude is near constant) is shown in

Fig. 4-20.

Figure 4-20. DRC Response Characteristic

Table 4-13. DRC Enable

Bit

Label

Default

Description

R43776 (0xAB00)

DRC1_CONTROL1

DRC1L_EN

DRC1 (left) enable

0 = Disabled

1 = Enabled

DRC1R_EN

DRC1 (right) enable

0 = Disabled

1 = Enabled

R43796 (0xAB14)

DRC2_CONTROL1

DRC2L_EN

DRC2 (left) enable

0 = Disabled

1 = Enabled

DRC2R_EN

DRC2 (right) enable

0 = Disabled

1 = Enabled

DRCn_KNEE1_IP

(Y0)

0dB

DRCn Input Amplitude (dB)

DRCn Output Amplitude (dB)

DRCn_KNEE1_OP

Knee 1

Knee 2

DRCn_KNEE2_IP

DRCn_KNEE2_OP

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