CS48L32 datasheet(28/192 Pages) CIRRUS

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Cirrus Logic

DS1219F4

CS48L32

4.2 Input Signal Path

4.2.4

Input Signal Path Enable

The input signal paths are enabled using the bits described in Table 4-2. The respective bits must be enabled for analog

or digital input on the respective input paths.

If the IN1 signal path is configured for analog input (IN1_MODE =0, see Section 4.2.6), the following control sequence

must be observed when enabling IN1 (left) or IN1 (right) input signal path:

1. If enabling the IN1 (left) path, write 0x2 to register 0x4688

2. If enabling the IN1 (right) path, write 0x2 to register 0x468C

3. Enable the required signal paths using IN1L_EN and IN1R_EN

4. Wait 200

s

5. If enabling the IN1 (left) path, write 0x0 to register 0x4688

6. If enabling the IN1 (right) path, write 0x0 to register 0x468C

Notes: If enabling one channel, with the other channel already enabled, the control steps relating to the already-enabled

channel should be omitted.

The IN1L_EN and IN1R_EN bits must be cleared before changing IN1_MODE.

The input signal paths are muted by default. It is recommended that deselecting the mute should be the final step of the

path-enable control sequence. Similarly, the mute should be selected as the first step of the path-disable control sequence.

The input signal path mute functions are controlled using the bits described in Table 4-4.

The VOUT_MIC power domain must be enabled when using the analog input signal paths. This power domain is provided

using an internal charge pump (CP2) and LDO regulator (LDO2). See Section 4.12 for details of these circuits.

The system clock, SYSCLK, must be configured and enabled before any audio path is enabled. See Section 4.8 for details

of the system clocks.

The CS48L32 performs automatic checks to confirm that the SYSCLK frequency is high enough to support the input signal

paths and associated ADCs. If the frequency is too low, an attempt to enable an input signal path fails. Note that active

signal paths are not affected under such circumstances.

The status bits in register 0x4004 indicate the status of each input signal path. If an underclocked error condition occurs,

these bits can be used to indicate which input signal paths have been enabled.

Table 4-2. Input Signal Path Enable

Bit

Label

Default

Description

R16384 (0x4000)

INPUT_CONTROL

IN2L_EN

Input Path 2 (left) enable

0 = Disabled

1 = Enabled

IN2R_EN

Input Path 2 (right) enable

0 = Disabled

1 = Enabled

IN1L_EN

Input Path 1 (left) enable

0 = Disabled

1 = Enabled

IN1R_EN

Input Path 1 (right) enable

0 = Disabled

1 = Enabled

CS48L32 Datasheet(PDF) 28 Page - Cirrus Logic

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