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CS48L32 Datasheet(PDF) 89 Page - Cirrus Logic |
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CS48L32 Datasheet(HTML) 89 Page - Cirrus Logic |
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89 / 192 page ![]() DS1219F4 Cirrus Logic 89 CS48L32 4.5 DSP Peripheral Control 4.5.3 General-Purpose Timer The CS48L32 incorporates two general-purpose timers, which support a wide variety of uses. The general-purpose timers provide time-stamp data for the event logger; they also provide input to the alarm-generator circuits, enabling time-dependent interrupt events to be generated. 4.5.3.1 Overview The timers allow time-stamp information to be associated with external signal detection, and other system events, enabling real-time data to be more easily integrated into user applications. The timers allow many advanced functions to be implemented with a high degree of autonomy from a host processor. The timers can use either internal system clocks, or external clock signals, as a reference. The selected reference is scaled down, using configurable dividers, to the required clock count frequency. 4.5.3.2 Timer Control The clock source for the timer is selected using TIMERn_REFCLK_SRC, (where n identifies the applicable timer, 1–2). base address + 0x6C ALMn_PULSE_DUR3 31:0 ALMn_CH3_ PULSE_DUR[31:0] 0x0000_ 0000 Channel 3 alarm output pulse duration Configures the duration of the GPIO alarm output indication. The pulse duration is referenced to the count rate of the selected timer source. base address + 0x70 ALMn_STATUS3 0ALMn_CH3_STS 0 Channel 3 status 0 = Disabled 1 = Enabled base address + 0x80 ALMn_CONFIG4 4ALMn_CH4_CONT 0 Channel 4 continuous mode select 0 = Single mode 1 = Continuous mode Channel 4 must be disabled (ALMn_CH4_STS = 0) when updating this field. 1:0 ALMn_CH4_TRIG_ MODE[1:0] 00 Channel 4 trigger mode select 00 = Absolute Mode: Alarm is triggered when the count value of the timer source is equal to ALMn_CH4_TRIG_VAL. 01 = Relative Mode: Alarm is triggered when the count value has incremented by a number equal to ALMn_CH4_TRIG_VAL. 10 = Combination Mode: Alarm is initially triggered as described for Absolute Mode; the alarm then operates as described for Relative Mode. 11 = Reserved Channel 4 must be disabled (ALMn_CH4_STS = 0) when updating this field. base address + 0x84 ALMn_CTRL4 15 ALMn_CH4_UPD 0 Channel 4 update control—Write 1 to indicate a new trigger value or pulse duration is ready to be applied. If Channel 4 is enabled and ALMn_CH4_UPD is set, the ALMn_CH4_ TRIG_VAL and ALMn_CH4_PULSE_DUR settings are updated when the alarm is next triggered or by writing 1 to ALMn_CH4_START. If Channel 4 is disabled, the ALMn_CH4_UPD bit has no effect, and the ALMn_CH4_TRIG_VAL and ALMn_CH4_PULSE_DUR settings are updated immediately when writing to the respective fields. 4ALMn_CH4_STOP — Channel 4 stop control—Write 1 to disable Channel 4 0ALMn_CH4_START — Channel 4 start control—Write 1 to enable or restart Channel 4 base address + 0x88 ALMn_TRIG_VAL4 31:0 ALMn_CH4_TRIG_ VAL[31:0] 0x0000_ 0000 Channel 4 alarm trigger value base address + 0x8C ALMn_PULSE_DUR4 31:0 ALMn_CH4_ PULSE_DUR[31:0] 0x0000_ 0000 Channel 4 alarm output pulse duration Configures the duration of the GPIO alarm output indication. The pulse duration is referenced to the count rate of the selected timer source. base address + 0x90 ALMn_STATUS4 0ALMn_CH4_STS 0 Channel 4 status 0 = Disabled 1 = Enabled Table 4-31. Alarm (ALMn) Control (Cont.) Register Address Bit Label Default Description |
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