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CS48L32 Datasheet(PDF) 69 Page - Cirrus Logic |
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CS48L32 Datasheet(HTML) 69 Page - Cirrus Logic |
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69 / 192 page  DS1219F4 Cirrus Logic 69 CS48L32 4.3 Digital Core 4.3.12 Isochronous Sample-Rate Converter (ISRC) The CS48L32 supports multiple signal paths through the digital core. The ISRCs provide sample-rate conversion between synchronized sample rates on the SYSCLK clock domain. There are three ISRCs on the CS48L32. ISRC1 provides four signal paths between two different sample rates; ISRC2 and ISRC3 provide two signal paths between two different sample rates, as shown in Fig. 4-27. The sample rates associated with each ISRC can each be set equal to SAMPLE_RATE_1, SAMPLE_RATE_2, SAMPLE_RATE_3, or SAMPLE_ RATE_4. See Section 4.8 for details of the sample-rate control registers. Each ISRC converts between a sample rate selected by ISRCn_FSL and a sample rate selected by ISRCn_FSH, (where n identifies the applicable ISRC 1, 2, or 3). The higher of the two sample rates must be selected by ISRCn_FSH in each case. The ISRCs support sample rates in the range 8–192 kHz. The sample-rate conversion ratio must be an integer (1–24) or equal to 1.5. The ISRCn_FSL and ISRCn_FSH fields must not be changed if any of the respective x_SRCn fields is nonzero. The associated x_SRCn fields must be cleared before writing new values to ISRCn_FSL or ISRCn_FSH. A minimum delay of 125 s must be allowed between clearing the x_SRCn fields and writing to the associated ISRCn_FSL or ISRCn_FSH fields. See Table 4-22 for details. The ISRC signal paths are enabled using the ISRCn_INTm_EN and ISRCn_DECm_EN bits, as follows: 0x2B80080 DSP1_SAMPLE_RATE_RX1 4:0 DSP1_RX1_RATE[4:0] 0x00 DSP1 RX Channel n Sample Rate 0x00 = SAMPLE_RATE_1 0x01 = SAMPLE_RATE_2 0x02 = SAMPLE_RATE_3 0x03 = SAMPLE_RATE_4 All other codes are reserved. The selected sample rate is valid in the range 8–192 kHz. All DSP1RXn_SRCx fields must be cleared before changing DSP1_RXn_RATE. 0x2B80088 DSP1_SAMPLE_RATE_RX2 4:0 DSP1_RX2_RATE[4:0] 0x00 0x2B80090 DSP1_SAMPLE_RATE_RX3 4:0 DSP1_RX3_RATE[4:0] 0x00 0x2B80098 DSP1_SAMPLE_RATE_RX4 4:0 DSP1_RX4_RATE[4:0] 0x00 0x2B800A0 DSP1_SAMPLE_RATE_RX5 4:0 DSP1_RX5_RATE[4:0] 0x00 0x2B800A8 DSP1_SAMPLE_RATE_RX6 4:0 DSP1_RX6_RATE[4:0] 0x00 0x2B800B0 DSP1_SAMPLE_RATE_RX7 4:0 DSP1_RX7_RATE[4:0] 0x00 0x2B800B8 DSP1_SAMPLE_RATE_RX8 4:0 DSP1_RX8_RATE[4:0] 0x00 0x2B80280 DSP1_SAMPLE_RATE_TX1 4:0 DSP1_TX1_RATE[4:0] 0x00 DSP1 TX Channel n Sample Rate 0x00 = SAMPLE_RATE_1 0x01 = SAMPLE_RATE_2 0x02 = SAMPLE_RATE_3 0x03 = SAMPLE_RATE_4 All other codes are reserved. The selected sample rate is valid in the range 8–192 kHz. 0x2B80288 DSP1_SAMPLE_RATE_TX2 4:0 DSP1_TX2_RATE[4:0] 0x00 0x2B80290 DSP1_SAMPLE_RATE_TX3 4:0 DSP1_TX3_RATE[4:0] 0x00 0x2B80298 DSP1_SAMPLE_RATE_TX4 4:0 DSP1_TX4_RATE[4:0] 0x00 0x2B802A0 DSP1_SAMPLE_RATE_TX5 4:0 DSP1_TX5_RATE[4:0] 0x00 0x2B802A8 DSP1_SAMPLE_RATE_TX6 4:0 DSP1_TX6_RATE[4:0] 0x00 0x2B802B0 DSP1_SAMPLE_RATE_TX7 4:0 DSP1_TX7_RATE[4:0] 0x00 0x2B802B8 DSP1_SAMPLE_RATE_TX8 4:0 DSP1_TX8_RATE[4:0] 0x00 Table 4-21. Digital-Core Sample-Rate Control (Cont.) Register Address Bit Label Default Description |
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