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S75WS256NDFBAWMB Datasheet(PDF) 53 Page - SPANSION |
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S75WS256NDFBAWMB Datasheet(HTML) 53 Page - SPANSION |
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53 / 216 page  February 17, 2005 S75WS-N-00_A0 S75WS256Nxx Based MCPs 51 Advance Information If the program command sequence is written to a bank that is in the Erase Suspend mode, writing the reset command returns that bank to the erase-suspend-read mode. The reset command may be also written during an Autoselect command sequence. If a bank has entered the Autoselect mode while in the Erase Suspend mode, writing the reset command returns that bank to the erase-suspend-read mode. If DQ1 goes high during a Write Buffer Programming operation, the system must write the Write to Buffer Abort Reset command sequence to RESET the device to reading array data. The standard RESET command does not work during this condition. To exit the unlock bypass mode, the system must issue a two-cycle unlock bypass reset com- mand sequence [see command table for details]. |
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