S75WS256NDFBAWMB datasheet(98/216 Pages) SPANSION

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S75WS256Nxx Based MCPs

S75WS-N-00_00_A0 February 17, 2005

Data

Sheet

General Description

The S29RS512N is a 512 Mbit, 1.8 Volt-only, simultaneous Read/Write, Burst Mode Flash memory

device, organized as 33,554,432words of 16 bits each. This device uses a single VCC of 1.65 to

1.95 V to read, program, and erase the memory array. A 9.0-volt VHH on ACC may be used for

faster program performance in a factory setting environment.

The device uses Chip Enable (CE#), Write Enable (WE#), Address Valid (AVD#) and Output En-

able (OE#) to control asynchronous read and write operations. For burst operations, the device

additionally requires Ready (RDY), and Clock (CLK). This implementation allows easy interface

with minimal glue logic to a wide range of microprocessors/microcontrollers for high performance

read operations.

The burst read mode feature gives system designers flexibility in the interface to the device. The

user can preset the burst length and then wrap or non-wrap through the same memory space, or

read the currently addressable flash array block in continuous mode.

The rising clock edge initiates burst accesses and determines when data will be output.

The device is entirely command set compatible with the JEDEC 42.4 single-power-supply

Flash standard. Commands are written to the command register using standard microprocessor

write timing. Register contents serve as inputs to an internal state-machine that controls the

erase and programming circuitry. Write cycles also internally latch addresses and data needed for

the programming and erase operations. Reading data out of the device is similar to reading from

other Flash or EPROM devices.

Device programming occurs by executing the program command sequence. This initiates the Em-

bedded Program algorithm - an internal algorithm that automatically times the program pulse

widths and verifies proper cell margin. The Unlock Bypass mode facilitates faster program times

by requiring only two write cycles to program data instead of four. Additionally, Write Buffer Pro-

gramming is available on this family of devices. This feature provides superior programming

performance by grouping locations being programmed.

Device erasure occurs by executing the erase command sequence. This initiates the Embedded

Erase algorithm - an internal algorithm that automatically preprograms the array (if it is not al-

ready programmed) before executing the erase operation. During erase, the device automatically

times the erase pulse widths and verifies proper cell margin.

The Program Suspend/Program Resume feature enables the user to put program on hold to

read data from any sector that is not selected for programming. If a read is needed from the Dy-

namic Protection area after a program suspend, then the user must use the proper command

sequence to enter and exit this region. The program suspend/resume functionality is also avail-

able when programming in erase suspend (1 level depth only).

The Erase Suspend/Erase Resume feature enables the user to put erase on hold to read data

from, or program data to, any sector that is not selected for erasure. True background erase can

thus be achieved. If a read is needed from the Dynamic Protection area, after an erase suspend,

then the user must use the proper command sequence to enter and exit this region.

The hardware RESET# pin terminates any operation in progress and resets the internal state

machine to reading array data. The RESET# pin may be tied to the system reset circuitry. A sys-

tem reset would thus also reset the device, enabling the system microprocessor to read boot-up

firmware from the Flash memory device.

The host system can detect whether a memory array program or erase operation is complete by

using the device status bit DQ7 (Data# Polling), DQ6/DQ2 (toggle bits), DQ5 (exceeded timing

limit), DQ3 (sector erase start timeout state indicator), and DQ1 (write to buffer abort). After a

program or erase cycle has been completed, the device automatically returns to reading array

data.

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