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S75WS256NDFBAWMB Datasheet(PDF) 60 Page - SPANSION |
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S75WS256NDFBAWMB Datasheet(HTML) 60 Page - SPANSION |
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60 / 216 page  58 S75WS256Nxx Based MCPs S75WS-N-00_A0 February 17, 2005 Ad van c e Inf o rmation Figure 9.3 Lock Register Program Algorithm Write Unlock Cycles: Address 555h, Data AAh Address 2AAh, Data 55h Write Enter Lock Register Command: Address 555h, Data 40h Program Lock Register Data Address XXXh, Data A0h Address 77h*, Data PD Unlock Cycle 1 Unlock Cycle 2 XXXh = Address don’t care * Not on future devices Program Data (PD): See text for Lock Register definitions Caution: Lock register can only be progammed once. Wait 4 µs PASS. Write Lock Register Exit Command: Address XXXh, Data 90h Address XXXh, Data 00h Device returns to reading array. Perform Polling Algorithm (see Write Operation Status flowchart) Yes Yes No No Done? DQ5 = 1? Error condition (Exceeded Timing Limits) FAIL. Write rest command to return to reading array. |
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