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TMP89FS60 Datasheet(PDF) 117 Page - Toshiba Semiconductor |
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TMP89FS60 Datasheet(HTML) 117 Page - Toshiba Semiconductor |
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117 / 410 page  Page 103 TMP89FS60 RA005 Figure 8-5 Port P2 0 1 S Output latch (for each bit) P2DR write P2i R RIN3 Note1 : R = 100 Ω (typ.) Note2 : RIN3 = 50k Ω (typ.) SCLK0, SO0, TXD0 SCLK0, SI0, RXD0 SIO0 UART0 Peripheral functions SIO0 I2C0 Peripheral functions P2PRD read Function control (for each bit) Input/output control (for each bit) P2FC write P2CR write Output control (for each bit) P2OUTCR write Programmable pull-up resistor VDD VDD Pull-up control (for each bit) P2PU write 0 1 S Output latch (for each bit) P2DR write P2j R Note1 : R = 100 Ω (typ.) Note2 : j = 3, 4 SCL0, SDA0, SO0 SCL0, SDA0, SI0 P2PRD read Function control (for each bit) Input/output control (for each bit) P2FC write P2CR write SYSCR1<STOP> SYSCR1<OUTEN> Reset signal SYSCR1<STOP> SYSCR1<OUTEN> Reset signal Note3 : i = 0 to 2, 5 to 7 Functions enclosed by the dotted line are for P20, P22 and P25 only. |
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