TMP89FS60 datasheet(182/410 Pages) TOSHIBA

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Page 168

14. 8-bit Timer Counter (TC0)

TMP89FS60

RA002

Note 1: fcgck: Gear clock [Hz], fs: Low-frequency clock [Hz]

Note 2: Set T00MOD while the timer is stopped. Writing data into T00MOD is invalid during the timer operation.

Note 3: In the 8-bit timer/event modes, the TFF0 setting is invalid. In this mode, when the PWM0 and PPG0 pins are set as the

function output pins in the port setting, the pins always output the "H" level.

Note 4: When EIN0 is set to "1" and the external clock input is selected as the source clock, the TCK0 setting is ignored.

Note 5: When the T001CR<TCAS> bit is "1", timer 00 operates in the 16-bit mode. The T00MOD setting is invalid and timer 00

cannot be used independently in this mode. When the PWM0 and PPG0 pins are set to the function output pins in the port

setting, the pins always output the "H" level.

Note 6: When the 16-bit mode is selected at T001CR<TCAS>, the timer start is controlled at T001CR<T01RUN>. Timer 00 is not

started by writing data into T001CR<T00RUN>.

Timer counter 00 mode register

T00MOD

76543

210

(0x002A)

Bit Symbol

TFF0

DBE0

TCK0

EIN0

TCM0

Read/Write

R/W

After reset

11000

000

TFF0

Timer F/F0 control

Clear

Set

DBE0

Double buffer control

Disable the double buffer

Enable the double buffer

TCK0

Operation clock selection

NORMAL1/2 or IDLE1/2 mode

SLOW1/2 or SLEEP1

mode

SYSCR1<DV9CK>

= "0"

SYSCR1<DV9CK>

= "1"

000

fcgck/211

fs/24

001

fcgck/210

fs/23

010

fcgck/28

011

fcgck/26

100

fcgck/24

101

fcgck/22

110

fcgck/2

111

fcgck

fs/22

EIN0

Selection for using external source

clock

Select the internal clock as the source clock.

Select an external clock as the source clock. (the falling edge of the

TC00 pin)

TCM0

Operation mode selection

8-bit timer/event counter modes

8-bit pulse width modulation output (PWM) mode

8-bit programmable pulse generate (PPG) mode

TMP89FS60 Datasheet(PDF) 182 Page - Toshiba Semiconductor

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