TMP89FS60 datasheet(184/410 Pages) TOSHIBA

184 / 410 page

Page 170

14. 8-bit Timer Counter (TC0)

TMP89FS60

RA002

Note 1: fcgck: Gear clock [Hz], fs: Low-frequency clock [Hz]

Note 2: Set T01MOD while the timer is stopped. Writing data into T01MOD is invalid during the timer operation.

Note 3: In the 8-bit timer/event modes, the TFF1 setting is invalid. In this mode, when the PWM1 and PPG1 pins are set as the

function output pins in the port setting, the pins always output the "H" level.

Note 4: When EIN1 is set to "1" and the external clock input is selected as the source clock, the TCK1 setting is ignored.

Timer counter 01 mode register

T01MOD

76543

210

(0x002B)

Bit Symbol

TFF1

DBE1

TCK1

EIN1

TCM1

Read/Write

R/W

After reset

11000

000

TFF1

Timer F/F1 control

Clear

Set

DBE1

Double buffer control

Disable the double buffer

Enable the double buffer

TCK1

Operation clock selection

NORMAL1/2 or IDLE1/2 mode

SLOW1/2 or SLEEP1

mode

SYSCR1<DV9CK>

= "0"

SYSCR1<DV9CK>

= "1"

000

fcgck/211

fs/24

001

fcgck/210

fs/23

010

fcgck/28

011

fcgck/26

100

fcgck/24

101

fcgck/22

110

fcgck/2

111

fcgck

fs/22

EIN1

Selection for using external source

clock

Select the internal clock as the source clock.

Select an external clock as the source clock. (the falling edge of the

TC01 pin)

TCM1

Operation mode selection

T001CR<TCAS>="0"

(8-bit mode)

T001CR<TCAS>="1"

(16-bit mode)

8-bit timer/event counter modes

16-bit timer/event counter modes

8-bit timer/event counter modes

16-bit timer/event counter modes

8-bit pulse width modulation out-

put (PWM) mode

12-bit pulse width modulation out-

put (PWM) mode

8-bit programmable pulse gener-

ate (PPG) mode

16-bit programmable pulse gener-

ate (PPG) mode

TMP89FS60 Datasheet(PDF) 184 Page - Toshiba Semiconductor

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