TMP89FS60 datasheet(321/410 Pages) TOSHIBA

321 / 410 page

Page 307

TMP89FS60

RA003

21.2 Functions

21.2.1 Flash memory command sequence execution and toggle control (FLSCR1

<FLSMD>)

To prevent inadvertent writes to the flash memory due to program error or microcontroller malfunction, the

execution of the flash memory command sequence and the toggle operation can be disabled (the flash memory

can be write protected) by making an appropriate control register setting (write protect). To enable the execu-

tion of the command sequence and the toggle operation, set FLSCR1<FLSMD> to "0y101", and then set

"0xD5" on FLSCR2<CR1EN>. To disable the execution of the command sequence, set FLSCR1<FLSMD> to

"0y010", and then set "0xD5" on FLSCR2<CR1EN>. If the command sequence or the toggle operation is exe-

cuted with the execution of the command sequence and the toggle operation set to "disable", the executed com-

mand sequence or toggle operation takes no effect.

After a reset, FLSCR1<FLSMD> is initialized to "0y010" to disable the execution of the command

sequence. FLSCR1<FLSMD> should normally be set to "0y010" except when a write or erase is to be per-

formed on the flash memory.

Note 1: If "0xD5" is set on FLSCR2<CR1EN> with FLSCR1<FLSMD> set to "101", the flash memory goes into an

active state, and MCU consumes the same amount of current as it does during a read.

Note 2: If FLSCR1<FLSMD> is set to "disable", subsequent commands (write instructions) generated are rejected

but a command sequence being executed is not initialized.

If you want to set FLSCR1<FLSMD> to "disable", you must finish all command sequences and verify that

the flash memory is ready to be read.

TMP89FS60 Datasheet(PDF) 321 Page - Toshiba Semiconductor