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TMP89FS60 Datasheet(PDF) 318 Page - Toshiba Semiconductor

Part # TMP89FS60
Description  8 Bit Microcontroller
PDF  410 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMP89FS60 Datasheet(HTML) 318 Page - Toshiba Semiconductor

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Page 304
21. Flash Memory
TMP89FS60
RA003
21.1 Flash Memory Control
The flash memory is controlled by the flash memory control register 1 (FLSCR1), flash memory control register 2
(FLSCR2), and flash memory standby control register (FLSSTB).
Note 1: If "0xD5" is set on FLSCR2<CR1EN> with FLSCR1<FLSMD> set to "101", the flash memory goes into an active state,
and MCU consumes the same amount of current as it does during a read.
Flash memory control register 1
FLSCR1
76543
210
(0x0FD0)
Bit Symbol
FLSMD
BAREA
FAREA
-
-
Read/Write
R/W
R/W
R/W
R/W
R/W
After reset
01000
000
FLSMD
Flash memory command
sequence and toggle control
010:
101:
Others:
Disable command sequence and toggle execution
Enable command sequence and toggle execution
Reserved
BAREA
BOOTROM mapping control
MCU mode
Serial PROM mode
0:
1:
Hide BOOTROM
Show BOOTROM
-
Show BOOTROM
FAREA
Flash memory area select control
00:
Assign the data area 0x8000 through 0xFFFF
to the data area 0x8000 through 0xFFFF (standard mapping).
01:
Assign the data area 0x1000 through 0x7FFF
to the data area 0x9000 through 0xFFFF.
10:
Assign the code area 0x8000 through 0xFFFF
to the data area 0x8000 through 0xFFFF.
11:
Assign the code area 0x1000 through 0x7FFF
to the data area 0x9000 through 0xFFFF.
Note 1:
It is prohibited to make a setting in "Reserved".
Note 2:
The flash memory control register 1 has a double-buffer structure comprised of the register FLSCR1 and a shift register.
Writing "0xD5" to the register FLSCR2 allows a register setting to be reflected and take effect in the shift register. This
means that a register setting value does not take effect until "0xD5" is written to the register FLSCR2. The value of the shift
register can be checked by reading the register FLSCRM.
Note 3:
FLSMD must be set to either "0y010" or "0y101".
Flash memory control register 2
FLSCR2
76543
210
(0x0FD1)
Bit Symbol
CR1EN
Read/Write
W
After reset
*
*******
CR1EN
FLSCR1 register
enable/disable control
0xD5
Others
Enable a change in the FLSCR1 setting
Reserved



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