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TMP89FS60 Datasheet(PDF) 314 Page - Toshiba Semiconductor |
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TMP89FS60 Datasheet(HTML) 314 Page - Toshiba Semiconductor |
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314 / 410 page ![]() Page 300 20. 10-bit AD Converter (ADC) 20.4 Register Setting TMP89FS60 RA001 20.4 Register Setting 1. Set the AD converter control register 1 (ADCCR1) as described below: • From the AD input channel select (SAIN), select the channel in which AD conversion is to be per- formed. • Set the analog input control (AINEN) to "Analog input enable". • At AMD, specify the AD operating mode (single or repeat mode). 2. Set the AD converter control register 2 (ADCCR2) as described below: • At the AD conversion time (ACK), specify the AD conversion time. For information on how to specify the conversion time, refer to the AD converter control register 2 and Table 20-1. 3. After the above two steps are completed, set "1" on the AD conversion start (ADRS) of the AD converter control register 1 (ADCCR1), and AD conversion starts immediately if single mode is selected. 4. As AD conversion is finished, the AD conversion end flag (EOCF) of the AD converter control register 2 (ADCCR2) is set to "1", the AD conversion result is stored in the AD converted value registers (ADCDRH and ADCDRL), and the INTADC interrupt request is generated. 5. After the conversion result is read from the AD converted value register (ADCDRH), EOCF is cleared to "0". EOCF will also be cleared to "0" if AD conversion is performed once again before reading the AD con- verted value register (ADCDRH). In this case, the previous conversion result is retained until AD conver- sion is finished. 20.5 Starting STOP/IDLE0/SLOW Modes If STOP/IDLE0/SLOW mode is started, registers ADCCR1<ADRS, AMD, AINEN>, ADCCR2<EOCF, ADBF>, ADCDRL and ADCDRH are initialized to "0". If any of these modes is started during AD conversion, AD conver- sion is suspended, and the AD converter stops (registers are likewise initialized). When restored from STOP/ IDLE0/ SLOW mode, AD conversion is not automatically restarted. Therefore, registers must be reconfigured as necessary. If STOP/IDLE0/SLOW mode is started during AD conversion, analog reference voltage is automatically discon- nected and, therefore, there is no possibility of current flowing into the analog reference voltage. Example: After selecting the conversion time 19.5 µs at 8 MHz and the analog input channel AIN3 pin, perform AD con- version once. After checking EOCF, store the conversion result in the HL register. The operation mode is single mode. : (Port setting) ; Before setting AD converter registers, make an appropriate port regis- ter setting.(For further details, refer to the section that describes I/O ports.) LD (ADCCR1), 0y00110011 ; Select AIN3. LD (ADCCR2), 0y00000011 ; Select conversion time (156/fcgck) and operation mode. SET (ADCCR1). 7 ; ADRS = 1 (AD conversion start) SLOOP : TEST (ADCCR2). 7 ; EOCF = 1 ? JRS T, SLOOP LD HL, (ADCDRL) ; Read result data |
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