7643 datasheet(354/424 Pages) RENESAS

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7643 Group

REJ09B0133-0200

APPENDIX

3.3 Notes on use

Rev.2.00

Aug 28, 2006

page 31 of 98

3.3.6 Notes on frequency synthesizer

•Bits 6 and 5 of the frequency synthesizer control register (address 006C16) are initialized to (b6, b5)

= “11” after reset release. Make sure to set bits 6 and 5 to “10” after the frequency synthesizer lock

status bit goes to “1”.

•Use the frequency synthesizer output clocks 2 ms to 5 ms later than setting the frequency synthesizer

enable bit to “1” (enabled). After that do not change any register values because it might cause output

clocks unstabilized temporarily.

•Make sure to connect a low-pulse filter to the LPF pin when using the frequency synthesizer.

•The frequency synthesizer divide register set value never affects fUSB frequency.

•When using the fSYN as an internal system clock, set the frequency synthesizer divide register so that

fSYN could be 24 MHz or less.

•When using the frequency synthesized clock function, we recommend using the fastest frequency

possible of f(XIN) or f(XCIN) as an input clock for the PLL.

•Set the value of frequency synthesizer multiply register 2 (FSM2) so that the fPIN is 1 MHZ or higher.

3.3.7 Notes on external devices connection

(1) Rewrite port P3 latch

In both memory expansion mode and microprocessor mode, ports P31 and P32 can be used as

output ports. We recommend to use the LDM instruction or STA instruction to write to port P3

you will need to map a memory that the CPU can read from and write to.

[Reason]

The access to address 000E16 is performed:

•Read from external memory

•Write to both port P3 latch and external memory.

It is because address 000E16 is assigned on an external area In the memory expansion mode and

microprocessor mode.

Accordingly, if a Read-Modify-Write instruction is executed to address 000E16, the external memory

contents is read out and after its modification it will be written into both port P3 latch and an

external memory. As a result, if an external memory is not allocated in address 000E16 then, the

MCU will read an undefined value and write its modified value into the port P3 latch. Therefore

port P3 latch value will become undefined.

(2) overlap of internal and external memories

In the memory expansion mode, if the internal and external memory areas overlap, the internal

memory becomes the valid memory for the overlapping area. When the CPU performs a read or

a write operation on this overlapped area, the following things happen:

•Read

The CPU reads out the data in the internal memory instead of in the external memory. Note that,

since the CPU will output a proper read signal, address signal, etc., the memory data at the

respective address will appear on the external data bus.

•Write

The CPU writes data to both the internal and external memories.

_____

______

(3) RD, WR pins

In the memory expansion mode or microprocessor mode, a read-out control signal is output from

______

the RD pin (P36), and a write-in control signal is output from the WR pin (P37). “L” level is output

______

from the RD pin at CPU read-out and from the WR pin at CPU write-in. These signals function

for internal access and external access.

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