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68HC705BD7 Datasheet(PDF) 42 Page - Freescale Semiconductor, Inc |
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68HC705BD7 Datasheet(HTML) 42 Page - Freescale Semiconductor, Inc |
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42 / 85 page ![]() SECTION 6: OPERATING MODES Page 32 GENERAL RELEASE SPECIFICATION MC68HC05BD7 Rev. 2.0 6.7 COP Watchdog Timer Considerations The COP Watchdog Timer is always enable in MC68HC05BD7. It will reset the MCU when it times out. For a system that must have intentional uses of the WAIT Mode, care must be taken to prevent such situations from happening during normal operations by arranging timely interrupts to reset the COP Watchdog timer. Figure 6-2: WAIT Flowcharts Y Y N N N Y Y 1.Fetch Reset Vector or 2.Service Interrupt a.Stack b.Set I-Bit c.Vector to Interrupt Routine Internal COP RESET? External Oscillator Active, and Internal Timer Clock Active Restart Internal Processor Clock Stop Internal Processor Clock, Clear I-Bit in CCR External H/W Interrupt? External RESET? WAIT N Internal Interrupt? Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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