68HC705BD7 datasheet(72/85 Pages) FREESCALE

72 / 85 page

SECTION 12: A/D CONVERTER

Page 62

GENERAL RELEASE SPECIFICATION

MC68HC05BD7 Rev. 2.0

12.3

Registers

12.3.1

ADC Control/status Register

This read/write register, located at address $14, contains six control bits and one status bit.

RESULT - Comparator Status Bit (Read Only)

When set, D/A output

≥ ANALOG IN.

When clear, D/A output

≥ ANALOG IN.

AD5:0 - A/D Digital Result

These bits are written by the user to perform successive

approximations in software. When a value causes the

RESULT bit to change state from the value immediately

before or after it, AD5:0 are considered to be the digital

equivalent of the analog input. Note that when AD5:0 are all

1’s,

ADC

virtually

turned

off

minimize

power

consumption.

12.3.2

ADC Channel Register

The ADC Channel Register, located at address $15 contains only two bits.

CHSL1:CHSL0 - Channel select bits

These two bit will select one of the four ADC input channels

analog

input

source.

Following

table

shows

its

configuration.

CHSL1:CHSL0 = 0 : 0 ==> ADC0

CHSL1:CHSL0 = 0 : 1 ==> ADC1

CHSL1:CHSL0 = 1 : 0 ==> ADC2

CHSL1:CHSL0 = 1 : 1 ==> ADC3

0000000

6543210

ADCSR

$0014

reset

⇒

RESULT

AD5

AD4

AD3

AD2

AD1

AD0

0000000

6543210

ADCCR

$0015

reset

⇒

CHSL1

CHSL0

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

68HC705BD7 Datasheet(PDF) 72 Page - Freescale Semiconductor, Inc

68HC705BD7 Datasheet(HTML) 72 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85

Datasheet Download

Link URL