68HC705BD7 datasheet(71/85 Pages) FREESCALE

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SECTION 12: A/D CONVERTER

Page 61

MC68HC05BD7 Rev. 2.0

GENERAL RELEASE SPECIFICATION

SECTION 12

A/D CONVERTER

12.1

Introduction

The Analog-to-Digital Converter (ADC) system consists of four analog input channels and

a single 6-bit D/A Converter and Comparator, with continuous conversion. A result flag

indicates if the comparator output is above or below the analog Input. ADC is disabled by

setting AD5 to AD0 bits of ADC Control/Status Register to all 1’s. This disable function is

mainly for low power application.

Figure 12-1: Structure of A/D Converter

12.2

Input

The ADC has four multiplexed input channels. Only one of the four channels will be

selected by CHSL1 and CHSL0 bits as analog input.

12.2.1

ADC0-ADC3

The ADC0 to ADC3 inputs are multiplexed with the PC2 to PC5 port pins. They are selected

as ADC input then the corresponding AD0-AD3 bit in the CR2 register is one. The user can

use the CHSL1 and CHSL0 bits to select one of the four channels to do the A/D Conversion

and get the approximate digital value of each input channel.

Vdd

RESULT

AD5

AD3

AD2

AD0

ADC0 or ADC1 or ADC2 or ADC3

AD4

AD1

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68HC705BD7 Datasheet(PDF) 71 Page - Freescale Semiconductor, Inc