68HC705BD7 datasheet(76/85 Pages) FREESCALE

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SECTION 13: ELECTRICAL SPECIFICATIONS

Page 66

GENERAL RELEASE SPECIFICATION

MC68HC05BD7 Rev. 2.0

13.3

DC Electrical Characteristics

(VDD = 5.0 Vdc ±10%, VSS = 0Vdc, TA = 0˚C to +70˚C, unless otherwise noted)

NOTES:

1. All values shown reflect average measurements.

2. Typical values at midpoint of voltage range, 25

°C only.

3. Wait IDD: Only timer system and SSP active.

4. Run (Operating) IDD, Wait IDD: Measured using external square wave clock source to EXTAL (fOSC = 4.2 MHz),

all inputs 0.2 VDC from rail; no DC loads, less than 50pF on all outputs, CL = 20 pF on EXTAL.

5. Wait IDD: All ports configured as inputs, VIL = 0.2 VDC, VIH = VDD-0.2 VDC.

6. Wait IDD is affected linearly by the EXTAL capacitance.

Characteristic

Symbol

Min

Typ

Max

Unit

Output High Voltage (ILoad = -5.0 mA)

PA0-PA7, PB0-PB1, PC2-PC7, PWM0-PWM7

VOH

VDD–0.8

—

Output Low Voltage (ILoad = 5.0 mA for +5V pins and

ILoad = 10.0 mA for +12V open-drain pins)

PA0-PA7, PB0-PB5, PC0-PC7, PD0-PD3, PWM0-

PWM7

VOL

—

0.5

Input High Voltage

PA0-PA7, PB0-PB5, PC0-PC7, PD0-PD1, RESET,

IRQ, EXTAL

(TTL Level) VSYNC, HSYNC, SOG

SDA,SCL

VIH

0.8 x VDD

2.0

0.8 x VDD

—

VDD

Input Low Voltage

PA0-PA7, PB0-PB5, PC0-PC7, PD0-PD3, RESET,

IRQ, EXTAL

(TTL Level) VSYNC, HSYNC, SOG

SDA,SCL

VIL

VSS

—

0.2 x VDD

0.8

0.2 x VDD

Supply Current (see Notes)

Run

Wait

IDD

—

I/O Ports Hi-Z Leakage Current

PA0-PA7, PB0-PB5, PC0-PC7, PD0-PD3

IOZ

——

µA

Input Current

RESET, IRQ, EXTAL, VSYNC, HSYNC

IIN

——

µA

Capacitance

Ports (as Input or Output), RESET, IRQ, EXTAL, XTAL

HSYNC, VSYNC

COUT

CIN

—

Freescale Semiconductor, Inc.

For More Information On This Product,

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