68HC705BD7 datasheet(11/85 Pages) FREESCALE

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SECTION 1: GENERAL DESCRIPTION

Page 1

MC68HC05BD7 Rev. 2.0

GENERAL RELEASE SPECIFICATION

SECTION 1

GENERAL DESCRIPTION

The MC68HC05BD7 HCMOS microcontroller is a member of the M68HC05 Family of low-

cost single-chip microcontrollers. It is particularly suitable as multi-sync computer monitor

controller. This 8-bit microcontroller unit (MCU) contains an on-chip oscillator, CPU, RAM,

ROM, DDC12AB module, parallel I/O, Pulse Width Modulator, Multi-Function Timer, 6-bit

ADC, and SYNC Processor.

1.1

Features

1.1.1

Hardware Features

•

HC05 Core

•

Low cost, HCMOS technology

•

40-pin DIP and 42-pin SDIP packages

•

256 Bytes of RAM for HC05BD2

•

384 Bytes of RAM for HC05BD7HC705BD7

•

5.75K-Bytes of User ROM for HC05BD2

•

11.75K-Bytes of User ROM for HC05BD7

•

11.5K-Bytes of User EPROM for HC705BD7

•

26 Bidirectional I/O lines: 14 dedicated and 12 multiplexed I/O lines. 4 of

the 14 dedicated I/O lines and 6 of the 12 multiplexed I/O lines have max.

+12V or +5V open-drain output buffers

•

16 x 8-bit PWM channels: Two 8-bit PWM channels have +12V open-

drain outputs: 8 dedicated 8-bit PWM channels have +5V open-drain

output options

•

6-bit ADC with 4 selectable input channels

•

Multi-Function Timer (MFT) with Periodic Interrupt

•

Sync Signal Processor module for processing horizontal, vertical,

composite, and SOG SYNC signals; frequency counting; polarity

detection; polarity controlled HSYNO and VSYNO or extracted VSYNC

outputs, and CLAMP pulse output

•

DDC12AB† module contains DDC1 hardware and multi-master I2C††

hardware for DDC2AB protocol

•

Software maskable Edge-Sensitive or Edge and Level-Sensitive External

Interrupt

†DDC is a standard defined by VESA.

††I2C-bus is a proprietary Philips interface bus.

Freescale Semiconductor, Inc.

For More Information On This Product,

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