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LPC1547JBD48 Datasheet(PDF) 31 Page - NXP Semiconductors

Part # LPC1547JBD48
Description  32-bit ARM Cortex-M3 microcontroller; up to 256 kB flash and 36 kB SRAM
PDF  99 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

LPC1547JBD48 Datasheet(HTML) 31 Page - NXP Semiconductors

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LPC15XX
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2014. All rights reserved.
Product data sheet
Rev. 1 — 19 February 2014
31 of 99
NXP Semiconductors
LPC15xx
32-bit ARM Cortex-M3 microcontroller
8.18 USART0/1/2
Remark: All USART functions are movable functions and are assigned to pins through
the switch matrix. Do not connect USART functions to the open-drain pins PIO0_22 and
PIO0_23.
Interrupts generated by the USART peripherals can wake up the part from Deep-sleep
and power-down modes if the USART is in synchronous mode, the 32 kHz mode is
enabled, or the CTS interrupt is enabled.
8.18.1 Features
• Maximum bit rates of 4.5 Mbit/s in asynchronous mode, 15 Mbit/s in synchronous
mode master mode, and 18 Mbit/s in synchronous slave mode.
• 7, 8, or 9 data bits and 1 or 2 stop bits.
• Synchronous mode with master or slave operation. Includes data phase selection and
continuous clock option.
• Multiprocessor/multidrop (9-bit) mode with software address compare.
• RS-485 transceiver output enable.
• Autobaud mode for automatic baud rate detection
• Parity generation and checking: odd, even, or none.
• Software selectable oversampling from 5 to 16 clocks in asynchronous mode.
• One transmit and one receive data buffer.
• RTS/CTS for hardware signaling for automatic flow control. Software flow control can
be performed using Delta CTS detect, Transmit Disable control, and any GPIO as an
RTS output.
• Received data and status can optionally be read from a single register
• Break generation and detection.
• Receive data is 2 of 3 sample "voting". Status flag set when one sample differs.
• Built-in Baud Rate Generator with auto-baud function.
• A fractional rate divider is shared among all USARTs.
• Interrupts available for Receiver Ready, Transmitter Ready, Receiver Idle, change in
receiver break detect, Framing error, Parity error, Overrun, Underrun, Delta CTS
detect, and receiver sample noise detected.
• Loopback mode for testing of data and flow control.
• In synchronous slave mode, wakes up the part from deep-sleep and power-down
modes.
• Special operating mode allows operation at up to 9600 baud using the 32 kHz RTC
oscillator as the UART clock. This mode can be used while the device is in
Deep-sleep or Power-down mode and can wake-up the device when a character is
received.
• USART transmit and receive functions work with the system DMA controller.
8.19 SPI0/1
All SPI functions are movable functions and are assigned to pins through the switch
matrix. Do not connect SPI functions to the open-drain pins PIO0_22 and PIO0_23.



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