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LPC1547JBD48 Datasheet(PDF) 59 Page - NXP Semiconductors

Part # LPC1547JBD48
Description  32-bit ARM Cortex-M3 microcontroller; up to 256 kB flash and 36 kB SRAM
PDF  99 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

LPC1547JBD48 Datasheet(HTML) 59 Page - NXP Semiconductors

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LPC15XX
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2014. All rights reserved.
Product data sheet
Rev. 1 — 19 February 2014
59 of 99
NXP Semiconductors
LPC15xx
32-bit ARM Cortex-M3 microcontroller
11.1 Power consumption
Power measurements in Active, Sleep, and Deep-sleep modes were performed under the
following conditions:
• Configure all pins as GPIO with pull-up resistor disabled in the IOCON block.
• Configure GPIO pins as outputs using the GPIO DIR register.
• Write 1 to the GPIO CLR register to drive the outputs LOW.
Conditions: Tamb = 25 C; active mode entered executing code while(1){} from flash; all
peripherals disabled in the SYSAHBCLKCTRL0/1 registers; all peripheral clocks disabled; internal
pull-up resistors disabled; BOD disabled; low-current mode.
1 MHz - 6 MHz: IRC enabled; PLL disabled.
12 MHz: IRC enabled; PLL disabled.
24 MHz to 72 MHz: IRC enabled; PLL enabled.
Fig 18. Active mode: Typical supply current IDD versus supply voltage VDD
aaa-011384
2.4
2.6
2.8
3
3.2
3.4
3.6
0
4
8
12
16
20
VDD (V)
IDD
DD
IDD
(mA)
(mA)
(mA)
12 MHz
24 MHz
48 MHz
60 MHz
72 MHz
36 MHz
6 MHz
1 MHz



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