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LPC1547JBD48 Datasheet(PDF) 45 Page - NXP Semiconductors |
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LPC1547JBD48 Datasheet(HTML) 45 Page - NXP Semiconductors |
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45 / 99 page ![]() LPC15XX All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved. Product data sheet Rev. 1 — 19 February 2014 45 of 99 NXP Semiconductors LPC15xx 32-bit ARM Cortex-M3 microcontroller 8.35 Power domains The LPC15xx provide two independent power domains that allow the bulk of the device to have power removed while maintaining operation of the RTC and the backup Registers. The VBAT pin supplies power only to the RTC domain. The RTC requires a minimum of power to operate, which can be supplied by an external battery. The device core power (VDD) is used to operate the RTC whenever VDD is present. Therefore, there is no power drain from the RTC battery when VDD is and VDD >= VBAT + 0.3 V. 8.36 Integrated oscillators The LPC15xx include the following independent oscillators: the system oscillator, the Internal RC oscillator (IRC), the watchdog oscillator, and the 32 kHz RTC oscillator. Each oscillator can be used for multiple purposes. Following reset, the LPC15xx operates from the internal RC oscillator until software switches to a different clock source. The IRC allows the system to operate without any external crystal and the bootloader code to operate at a known frequency. See Figure 14 for an overview of the LPC15xx clock generation. Fig 15. Power distribution REAL-TIME CLOCK BACKUP REGISTERS WAKE-UP CONTROL REGULATOR 32 kHz OSCILLATOR ALWAYS-ON/RTC POWER DOMAIN MAIN POWER DOMAIN RTCXIN VBAT VDD RTCXOUT VDD VSS to memories, peripherals, oscillators, PLLs to core to I/O pads ADC TEMP SENSE ACMP DAC INTERNAL VOLTAGE REF ADC POWER DOMAIN VDDA VSSA LPC15xx ULTRA LOW-POWER REGULATOR WAKEUP aaa-010876 |
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