LPC1547JBD48 datasheet(55/99 Pages) NXP

55 / 99 page

LPC15XX

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Product data sheet

Rev. 1 — 19 February 2014

55 of 99

NXP Semiconductors

LPC15xx

32-bit ARM Cortex-M3 microcontroller

IBAT

battery supply current

Deep power-down mode; VDD =

VDDA = 3.3 V; VBAT = 3.0 V

[13]

VDD and VDDA tied to ground;

VBAT = 3.0 V

[13]

A

Standard port pins configured as digital pins, RESET; see Figure 17

IIL

LOW-level input current VI = 0 V; on-chip pull-up resistor

disabled

-0.5

10[14]

IIH

HIGH-level input

current

VI =VDD; on-chip pull-down

resistor disabled

-0.5

10[14]

IOZ

OFF-state output

current

VO =0 V; VO =VDD; on-chip

pull-up/down resistors disabled

-0.5

10[14]

input voltage

VDD  2.4 V; 5 V tolerant pins

except PIO0_12

[16]

[18]

VDD  2.4 V; on 3 V tolerant pin

PIO0_12

VDDA

VDD = 0 V

3.6

output voltage

output active

VDD

VIH

HIGH-level input

voltage

0.7VDD

VIL

LOW-level input voltage

0.3VDD V

Vhys

hysteresis voltage

2.4 V <= VDD < 3.0 V

0.30

3.0 V <= VDD <= 3.6 V

0.35

VOH

HIGH-level output

voltage

IOH =4 mA

VDD  0.4 -

VOL

LOW-level output

voltage

IOL =4 mA

0.4

IOH

HIGH-level output

current

VOH =VDD  0.4 V

IOL

LOW-level output

current

VOL =0.4 V

IOHS

HIGH-level short-circuit

output current

VOH =0V

[19] --

-45

IOLS

LOW-level short-circuit

output current

VOL =VDD

[19] --

Ipd

pull-down current

VI = 5 V

150

A

Ipu

pull-up current

VI =0V;

10

50

85

A

VDD <VI <5V

A

High-drive output pin configured as digital pin (PIO0_24); see Figure 17

IIL

LOW-level input current VI = 0 V; on-chip pull-up resistor

disabled

-0.5

10[14]

IIH

HIGH-level input

current

VI =VDD; on-chip pull-down

resistor disabled

-0.5

10[14]

IOZ

OFF-state output

current

VO =0 V; VO =VDD; on-chip

pull-up/down resistors disabled

-0.5

10[14]

Table 11.

Static characteristics …continued

Tamb = 40 C to +105 C, unless otherwise specified.

Symbol

Parameter

Conditions

Min

Typ[1]

Max

Unit

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