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82374EB Datasheet(PDF) 38 Page - Intel Corporation |
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82374EB Datasheet(HTML) 38 Page - Intel Corporation |
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38 / 208 page  82374EB82374SB 314 BIOSCSABIOS CHIP SELECT A REGISTER Address Offset 42h Default Value 10h Attribute ReadWrite Size 8 Bits The LBIOSCS signal is used to decode access to the motherboard BIOS The ESC decodes memory access to the following address ranges and if the range has been enabled the LBIOSCS signal is always asserted for memory reads in the enabled BIOS range If the BIOS Write Enable bit is set in the configuration register BIOSCSB the LBIOSCS is also asserted for memory write cycles Bit Description 76 Reserved 5 Enlarged BIOS During Memory access to locations FFF80000h – FFFDFFFFh with this bit set LBIOSCS will be asserted for memory read cycles If bit 3 of BIOSCSB is set then LBIOSCS will be asserted for write cycles as well 4 High BIOS During Memory access to locations 0F0000h – 0FFFFFh FF0000h – FFFFFFh FFFF0000h – FFFFFFFFh with this bit set LBIOSCS will be asserted for memory read cycles If bit 3 of BIOSCSB is set then LBIOSCS will be asserted for write cycles as well 3 Low BIOS 4 During Memory access to locations 0EC000h – 0EFFFFh FFEEC000h – FFEEFFFFh FFFEC000h – FFFEFFFFh with this bit set LBIOSCS will be asserted for memory read cycles If bit 3 of BIOSCSB is set then LBIOSCS will be asserted for write cycles as well 2 Low BIOS 3 During Memory access to locations 0E8000h – 0EBFFFh FFEE8000h – FFEEBFFFh FFFE8000h – FFFEBFFFh with this bit set LBIOSCS will be asserted for memory read cycles If bit 3 of BIOSCSB is set then LBIOSCS will be asserted for write cycles as well 1 Low BIOS 2 During Memory access to locations 0E4000h – 0E7FFFh FFEE4000h – FFEE7FFFh FFFE4000h – FFFE7FFFh with this bit set LBIOSCS will be asserted for memory read cycles If bit 3 of BIOSCSB is set then LBIOSCS will be asserted for write cycles as well 0 Low BIOS 1 During Memory access to locations 0E0000h – 0E3FFFh FFEE0000h – FFEE3FFFh FFFE0000h – FFFE3FFFh with this bit set LBIOSCS will be asserted for memory read cycles If bit 3 of BIOSCSB is set then LBIOSCS will be asserted for write cycles as well 38 |
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