82374EB datasheet(72/208 Pages) INTEL

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82374EB82374SB

Bit

Description

S-G Active

The Scatter-Gather Active bit indicates the current S-G transfer status Bit 0 will be a 1

after a S-G Start Command is issued Bit 0 will be a 0 before the Start command is issued Bit 0 will be

a 0 after terminal count on the last buffer on the channel is reached Bit 0 will also be a 0 after a S-G

Stop command has been issued Following reset or Master Clear this bit is reset to 0

3223 SCAGADSCATTER-GATHER DESCRIPTOR TABLE POINTER REGISTER

0420h – 0423hChannels 0

0424h – 0424hChannels 1

0428h – 042BhChannels 2

042Ch – 042ChChannels 3

0434h – 0437hChannels 5

0438h – 043BhChannels 6

043Ch – 043FhChannels 7

Default Value

See below

Attribute

ReadWrite Relocateable

Size

32 Bits

The SGD Table Pointer register contains the 32 bit pointer to the first SGD entry in the SGD table in memory

Before the start of a S-G transfer this register should have been programmed to point to the first SGD in the

SGD table Following a ‘‘Start’’ command it initiates reading the first SGD entry by pointing to the first SGD

entry to be fetched from the memory Subsequently at the end of the each buffer block transfer the contents

of the SGD table pointer registers are incremented by 8 until the end of the SGD table is reached

When programmed by the CPU the SGD Table Pointer Registers can be programmed with a single 32-bit PCI

write Note that the PCEB and EISA Bus Controller will split the 32-bit write into four 8-bit writes

Following a prefetch to the address pointed to by the channel’s SGD table pointer register the new Memory

Address is loaded into the Base Address register the new Byte Count is loaded into the Base Byte Count

The end of the SGD table is indicated by a End of Table field having a MSB equal to 1 When this value is read

during a SGD fetch the current SGD value is not replaced Instead bit 7 of the channel’s status register is set

to a 1 when the EOL is read from memory

Bit

Description

310

SGD Table Pointer

The SGD table pointer register contains a 32-bit pointer to the main memory

location where the software maintains the Scatter Gather Descriptors for the linked-list buffers

These bits are translated into A 310 signals for accessing memory on the PCI

82374EB Datasheet(PDF) 72 Page - Intel Corporation