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82374EB Datasheet(PDF) 43 Page - Intel Corporation

Part # 82374EB
Description  SYSTEM COMPONENT (ESC)
PDF  208 Pages
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

82374EB Datasheet(HTML) 43 Page - Intel Corporation

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82374EB82374SB
Pin Name
Description
32
Serial Port B Address Decode
If either COM1 or COM2 address ranges are selected these
bits default to disabled upon PCIRST
Bits 32
Decode
00
3F8h – 3FFh (COM1)
01
2F8h – 2FFh (COM2)
10
Reserved
11
Port A disabled
10
Serial Port A Address Decode
If either COM1 or COM2 address ranges are selected these
bits default to disabled upon PCIRST
Bits 10
Decode
00
3F8h – 3FFh (COM1)
01
2F8h – 2FFh (COM2)
10
Reserved
11
Port A disabled
319 EISAID 41
EISA ID REGISTERS
Address Offset
50h 51h 52h 53h
Default Value
00h 00h 00h 00h
Attribute
ReadWrite
Size
8 Bits each
These 8 bit registers contain the EISA motherboard ID The data in the register is reflected on the data bus for
IO cycles addressed to 0C80h – 0C83h respectively
Bit
Description
70
EISA ID Byte
These bits contain the EISA Motherboard ID information On power up these bits
default to 00h These bit are written with the ID value during configuration The value of these bits are
reflected in IO registers 0C80h – 0C83h
3110 SGRBASCATTERGATHER RELOCATE BASE ADDRESS REGISTER
Address Offset
57h
Default Value
04h
Attribute
ReadWrite
Size
8 Bits
The value programmed in this register determines the high order IO address of the S-G registers The default
value is 04h
Bit
Description
70
S-G Relocate Byte
These bits determine the IO location of the Scatter Gather Registers The
Scatter-Gather register relocation range is xx10h – xx3Fh (default 0410h – 043Fh) These bits
determine the Byte 1 of the IO address Address signals LA 158 are compared against the contents
of this register (bit 70 ) to determine IO accesses to the Scatter-Gather registers The default on
Power up is 04h
43



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