AN4650 datasheet(87/102 Pages) STMICROELECTRONICS

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AN4650

First-in first-out (FIFO) buffer

102

8.3

Setting the FIFO trigger, FIFO ODR and decimation factors

Writing data in the FIFO can be configured to be triggered by three different sources.

Figure 28. FIFO trigger signal selection

As described in Figure 28, the DATA_VALID_SEL_FIFO bit of the MASTER_CONFIG

this purpose:



if both the DATA_VALID_SEL_FIFO bit and the TIMER_PEDO_FIFO_DRDY bit are set

to 0, writing data in the FIFO is triggered by the accelerometer/gyroscope data-ready.

The ODR_FIFO_[3:0] bits of FIFO_CTRL5 define the maximum data rate at which data

are stored in FIFO; the latter is limited to the maximum value between the

accelerometer ODR (defined by the ODR_XL[3:0] bits of the CTRL1_XL register) and

the gyroscope ODR (defined by the ODR_G[3:0] bits of the CTRL2_G register);



if the DATA_VALID_SEL_FIFO bit is set to 0 and the TIMER_PEDO_FIFO_DRDY bit is

set to 1, writing data in the FIFO is triggered by step detection (corresponding to the

behavior of the STEP_DETECTED bit of the FUNC_SRC register): the data are stored

in FIFO every time a step is detected;



if the DATA_VALID_SEL_FIFO bit is set to 1, writing data in the FIFO is triggered by the

sensor hub (corresponding to the behavior of the SENSORHUB_END_OP bit of the

FUNC_SRC register), regardless of the configuration of the

TIMER_PEDO_FIFO_DRDY bit: the data are stored in FIFO when the sensor hub

routine is complete.

AN4650 Datasheet(PDF) 87 Page - STMicroelectronics