AN4650 datasheet(42/102 Pages) STMICROELECTRONICS

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Interrupt generation

AN4650

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DocID027415 Rev 1

The low-pass filter LPF2 can also be used in 6D functionality by setting the

LOW_PASS_ON_6D bit of the CTRL8_XL register to 1. The LPF2 filter has to be enabled

as described in Section 2.6.

This interrupt signal can be driven to the two interrupt pins by setting to 1 the INT1_6D bit of

the MD1_CFG register or the INT2_6D bit of the MD2_CFG register; it can also be checked

by reading the D6D_IA bit of the D6D_SRC register.

If latch mode is disabled (LIR bit of TAP_CFG is set to 0), the interrupt signal is active only

for 1/ODR_XL[s] then it is automatically deasserted (ODR_XL is the accelerometer output

data rate). If latch mode is enabled and the 6D interrupt signal is driven to the interrupt pins,

once an orientation change has occurred and the interrupt pin is asserted, a reading of the

D6D_SRC register clears the request and the device is ready to recognize a different

orientation. If the latch mode is enabled but the interrupt signal is not driven to the interrupt

pins, the latch feature does not take effect.

Referring to the six possible cases illustrated in Figure 13, the content of the D6D_SRC

Figure 13. 6D recognized orientations

Table 30. Threshold for 4D/6D function

SIXD_THS[1:0]

Threshold value [degrees]

AN4650 Datasheet(PDF) 42 Page - STMicroelectronics