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AN4650 Datasheet(PDF) 89 Page - STMicroelectronics

Part # AN4650
Description  This document is intended to provide usage information
PDF  102 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN4650 Datasheet(HTML) 89 Page - STMicroelectronics

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AN4650
First-in first-out (FIFO) buffer
102
It is recommended to read all FIFO slots faster than 1*ODR, in order to avoid losing data. In
this case, the number of read operations to be performed to empty the FIFO buffer
corresponds to the value of the DIFF_FIFO_[11:0] bits.
The rounding function (see Section 3.6 for details) is automatically enabled when applying a
multiple read operation to the FIFO output registers FIFO_DATA_OUT_L and
FIFO_DATA_OUT_H.
8.5
FIFO pattern
Data are stored in the FIFO without any tag in order to maximize the number of samples
stored. To understand which couple of data and which FIFO data set is going to be read, it is
necessary to check the content of the FIFO_PATTERN_[9:0] bits in the FIFO_STATUS3 and
FIFO_STATUS4 registers.
Data are written to the FIFO with a specific pattern (for example GyroX, GyroY, GyroZ,
AccX, AccY, AccZ). This pattern changes depending on the ODRs and decimation factors
assigned to the four FIFO data sets. The FIFO_PATTERN_[9:0] bits contain a number from
0 to the index of the last sample of the pattern, then the pattern is repeated in all FIFO
content.
The first sequence of data stored in FIFO buffer contains the data of all the enabled FIFO
data sets, from the first one to the fourth one. Then, data are repeated depending on the
value of the decimation factor set for each FIFO data set.
The examples in the next sections explain how to use the information contained in the
FIFO_PATTERN_[9:0] bits.
8.5.1
Example 1
Supposing the FIFO is storing data from the gyroscope and accelerometer at the same
ODR:
Gyroscope ODR = 104 Hz, Accelerometer ODR = 104 Hz.
If the internal trigger (accelerometer/gyroscope data-ready) is used, it’s recommended to set
the ODR_FIFO_[3:0] bits of the FIFO_CTRL5 register to 0100b in order to set the FIFO
trigger ODR to 104 Hz.
Both the DEC_FIFO_GYRO[2:0] and the DEC_FIFO_XL[2:0] fields of the FIFO_CTRL3
register have to be set to 001b (no decimation).
The following data pattern is repeated every 6 samples (each sample is represented as 16-
bit data):
Gx Gy Gz XLx XLy XLz (Gyroscope and Accelerometer data)
The FIFO_PATTERN_[9:0] bits will contain a number from 0 to 5, as shown in Table 71.



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