AN4650 datasheet(20/102 Pages) STMICROELECTRONICS

20 / 102 page

Operating modes

AN4650

20/102

DocID027415 Rev 1

2.6

Accelerometer bandwidth

The accelerometer sampling chain (Figure 1) is represented by a cascade of four blocks: an

analog low-pass filter, an ADC converter, a digital low-pass filter and the composite group of

digital filters described in Figure 2.

Figure 1. Accelerometer sampling chain diagram

The analog signal coming from the mechanical parts is filtered by a low-pass anti-aliasing

filter before being converted by the ADC. The anti-aliasing filter is enabled in High-

Performance mode only.

If the XL_BW_SCAL_ODR bit in CTRL4_C register is set to 1, the bandwidth of this analog

filter is determined by setting the BW_XL bits of CTRL1_XL register; relative filter cutoff

frequency values are given in Table 6. If the XL_BW_SCAL_ODR bit is set to 0, the

bandwidth of the analog filter is determined by the ODR_XL selection (Table 7).

Table 6. Accelerometer anti-aliasing filter bandwidth selection

(XL_BW_SCAL_ODR=1)

BW_XL[1:0]

Bandwidth [Hz]

400

200

100

Table 7. Accelerometer anti-aliasing bandwidth options (High-Performance mode)

Accelerometer

ODR [Hz]

Analog filter cutoff [Hz]

XL_BW_SCAL_ODR = 0

Analog filter cutoff [Hz]

XL_BW_SCAL_ODR = 1

13 Hz (High Performance)

BW_XL[1:0]

26 Hz (High Performance)

BW_XL[1:0]

52 Hz (High Performance)

BW_XL[1:0]

104 Hz (High Performance)

BW_XL[1:0]

208 Hz (High Performance)

100

BW_XL[1:0]

416 Hz (High Performance)

200

BW_XL[1:0]

833 Hz (High Performance)

400

BW_XL[1:0]

1.66 kHz (High Performance)

400

BW_XL[1:0]

3.33 kHz (High Performance)

FILTER NOT USED

BW_XL[1:0]

6.66 kHz (High Performance)

FILTER NOT USED

BW_XL[1:0]

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