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DP83867CS Datasheet(PDF) 36 Page - Texas Instruments

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Part # DP83867CS
Description  High Immunity, Small Form Factor 10/100/1000 Ethernet Physical Layer Transceiver
PDF  114 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

DP83867CS Datasheet(HTML) 36 Page - Texas Instruments

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Rhi
Rlo
9k
±25%
VDDIO
V
STRAP
DP83867
DP83867CS, DP83867IS, DP83867E
SNLS504 – OCTOBER 2015
www.ti.com
9.5 Programming
9.5.1 Strap Configuration
The DP83867 uses many of the functional pins as strap options to place the device into specific modes of
operation. The values of these pins are sampled at power up or hard reset. During software resets, the strap
options are internally reloaded from the values sampled at power up or hard reset. The strap option pin
assignments are defined below. The functional pin name is indicated in parentheses.
The strap pins supported are 4-level straps, which are described in greater detail below.
NOTE
Since strap pins may have alternate functions after reset is deasserted, they should not be
connected directly to VDD or GND.
Configuration of the device may be done via the 4-level strap pins or via the management register interface. A
pullup resistor and a pulldown resistor of suggested values may be used to set the voltage ratio of the 4-level
strap pin input and the supply to select one of the possible selected modes.
The MAC interface pins must support I/O voltages of 3.3 V, 2.5 V, and 1.8 V. As the strap inputs will be
implemented on these pins, the straps must also support operation at 3.3-V, 2.5-V, and 1.8-V supplies.
The device should feature 4-level strap pins, each supporting at least 4 selectable options.
Figure 17. Strap Circuit
Table 6. 4-level Strap Resistor Ratios
MODE
Target Voltage
IDEAL Rhi (k
Ω)
IDEAL Rlo (k
Ω)
Vmin (V)
Vtyp (V)
Vmax (V)
1
0
0
0.065*VDDIO
OPEN
OPEN
2
0.139*VDDIO
0.15*VDDIO
0.16*VDDIO
11
2.49
3
0.228*VDDIO
0.244*VDDIO
0.256*VDDIO
6.04
2.49
4
0.728*VDDIO
0.783*VDDIO
0.82*VDDIO
2.49
OPEN
For SGMII Mode 4 strap, it is recommended to use Rhi=4k
Ω and Rlo=10kΩ on RX_D0 & RX_D1 , RX_D2 &
RX_D3.
All straps have a 9k
Ω ±25% internal pull down resistor. The voltage at strap pins should be between the Vmin
and Vmax mentioned in the 'Target Voltage' column in the table above. Strap resistors with 1% tolerance are
recommended.
36
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Copyright © 2015, Texas Instruments Incorporated



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