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DP83867CS Datasheet(PDF) 48 Page - Texas Instruments

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Part # DP83867CS
Description  High Immunity, Small Form Factor 10/100/1000 Ethernet Physical Layer Transceiver
PDF  114 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

DP83867CS Datasheet(HTML) 48 Page - Texas Instruments

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DP83867CS, DP83867IS, DP83867E
SNLS504 – OCTOBER 2015
www.ti.com
Table 12. Basic Mode Status Register (BMSR), Address 0x0001 (continued)
BIT
BIT NAME
DEFAULT
DESCRIPTION
1
JABBER DETECT
0, RO/LH
Jabber Detect: This bit only has meaning in 10 Mbps mode.
1 = Jabber condition detected.
0 = No Jabber.
This bit is implemented with a latching function, such that the
occurrence of a jabber condition causes it to set until it is cleared by
a read to this register by the management interface or by a reset.
0
EXTENDED CAPABILITY
1, RO/P
Extended Capability:
1 = Extended register capabilities.
0 = Basic register set capabilities only.
48
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