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DP83867CS Datasheet(PDF) 64 Page - Texas Instruments |
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DP83867CS Datasheet(HTML) 64 Page - Texas Instruments |
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64 / 114 page ![]() DP83867CS, DP83867IS, DP83867E SNLS504 – OCTOBER 2015 www.ti.com Table 27. MII Interrupt Control Register (MICR), Address 0x0012 (continued) BIT BIT NAME DEFAULT DESCRIPTION 2 XGMII_ERR_INT_EN 0, RW Enable xGMII Error Interrupt: 1 = Enable xGMII Error Interrupt. 0 = Disable xGMII Error Interrupt. 1 POLARITY_CHNG_INT_EN 0, RW Enable Polarity Change Interrupt: 1 = Enable Polarity Change interrupt. 0 = Disable Polarity Change interrupt. 0 JABBER_INT_EN 0, RW Enable Jabber Interrupt: 1 = Enable Jabber interrupt. 0 = Disable Jabber interrupt. 64 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated |
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