DP83867CS datasheet(97/114 Pages) TI1

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DP83867CS, DP83867IS, DP83867E

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SNLS504 – OCTOBER 2015

9.6.89 Advanced Link Cable Diagnostics Control Register (ALCD_CTRL)

Table 100. Advanced Link Cable Diagnostics Control Register (ALCD_CTRL), Address 0x01A7

BIT

BIT NAME

DEFAULT

DESCRIPTION

15:8

ALCD_SUM

0000 0000, RO

ALCD result

7:6

RESERVED

0, RO

RESERVED

ALCD_SUM_DONE

0, RO

ALCD Complete:

1 = ALCD process has completed.

0 = ALCD process has not completed.

ALCD_CLEAR

0, RW, SC

Clear ALCD:

1 = Reset the ALCD results.

3:0

RESERVED

0, RO

RESERVED

9.6.90 MMD3 PCS Control Register (MMD3_PCS_CTRL)

This register is accessed via indirect register access. See Extended Address Space Access for details

Table 101. MMD3 PCS Control Register (MMD3_PCS_CTRL), MMD3 Address 0x0000

BIT

BIT NAME

DEFAULT

DESCRIPTION

PCS_RESET

0, RW, SC

MMD3 / MMD7 PCS Reset:

1 = Reset the MMD3 and MMD7 registers. Note: Setting this bit will

subsequently cause a soft reset via the BMCR RESET bit (bit 15 of

0 = Normal operation.

14:0

RESERVED

0, RO

RESERVED: Writes ignored, read as 0.

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