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DP83867CS Datasheet(PDF) 92 Page - Texas Instruments |
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DP83867CS Datasheet(HTML) 92 Page - Texas Instruments |
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92 / 114 page ![]() DP83867CS, DP83867IS, DP83867E SNLS504 – OCTOBER 2015 www.ti.com 9.6.78 Receive Pattern Register 31 (RXFPAT31) Table 89. Receive Pattern Register 31 (RXFPAT31), Address 0x015A BIT BIT NAME DEFAULT DESCRIPTION 15:0 PATTERN_BYTES_0_1 0, RW Bytes 60 + 61 of the configured pattern. Each byte can be masked separately via the RXF_PATTERN_BYTE_MASK registers. 9.6.79 Receive Pattern Register 32 (RXFPAT32) Table 90. Receive Pattern Register 32 (RXFPAT32), Address 0x015B BIT BIT NAME DEFAULT DESCRIPTION Bytes 62 + 63 of the configured pattern. Each byte can be masked 15:0 PATTERN_BYTES_62_63 0, RW separately via the RXF_PATTERN_BYTE_MASK registers. 9.6.80 Receive Pattern Byte Mask Register 1 (RXFPBM1) Table 91. Receive Pattern Byte Mask Register 1 (RXFPBM1), Address 0x015C BIT BIT NAME DEFAULT DESCRIPTION 15:0 PATTERN_BYTES_ 0, RW Masks for bytes 0 to 15 of the pattern. A '1' indicates a mask for the MASK_0_15 associated byte. 9.6.81 Receive Pattern Byte Mask Register 2 (RXFPBM2) Table 92. Receive Pattern Byte Mask Register 2 (RXFPBM2), Address 0x015D BIT BIT NAME DEFAULT DESCRIPTION 15:0 PATTERN_BYTES_ 0, RW Masks for bytes 16 to 31 of the pattern. A '1' indicates a mask for MASK_16_31 the associated byte. 9.6.82 Receive Pattern Byte Mask Register 3 (RXFPBM3) Table 93. Receive Pattern Byte Mask Register 3 (RXFPBM3), Address 0x015E BIT BIT NAME DEFAULT DESCRIPTION 15:0 PATTERN_BYTES_ 0, RW Masks for bytes 32 to 47 of the pattern. A '1' indicates a mask for MASK_32_47 the associated byte. 9.6.83 Receive Pattern Byte Mask Register 4 (RXFPBM4) Table 94. Receive Pattern Byte Mask Register 4 (RXFPBM4), Address 0x015F BIT BIT NAME DEFAULT DESCRIPTION 15:0 PATTERN_BYTES_ 0, RW Masks for bytes 48 to 63 of the pattern. A '1' indicates a mask for MASK_48_63 the associated byte. 9.6.84 Receive Pattern Control (RXFPATC) Table 95. Receive Status Register (RXFSTS), Address 0x0161 BIT BIT NAME DEFAULT DESCRIPTION 15:6 RESERVED 0, RO RESERVED: Writes ignored, read as 0. 5:0 PATTERN_START_POINT 0, RW Number of bytes after SFD where comparison of the RX packet to the configured pattern begins: 111111 - Start compare in the 64th byte after SFD 000000 - Start compare in the 1st byte after SFD 92 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated |
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