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DP83867CS Datasheet(PDF) 57 Page - Texas Instruments |
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DP83867CS Datasheet(HTML) 57 Page - Texas Instruments |
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57 / 114 page  DP83867CS, DP83867IS, DP83867E www.ti.com SNLS504 – OCTOBER 2015 9.6.11 Status Register 1 (STS1) Table 21. Status Register 1 (STS1) Address 0x000A BIT BIT NAME DEFAULT DESCRIPTION 15 MASTER / SLAVE 0, RO, LH, COR Master / Slave Manual Configuration Fault Detected: CONFIGURATION FAULT 1 = Manual Master/Slave Configuration fault detected. 0 = No Manual Master/Slave Configuration fault detected. 14 MASTER / SLAVE 0, RO Master / Slave Configuration Results: CONFIGURATION 1 = Configuration resolved to MASTER. RESOLUTION 0 = Configuration resolved to SLAVE. 13 LOCAL RECEIVER STATUS 0, RO Local Receiver Status: 1 = Local receiveris OK. 0 = Local receiveris not OK. 12 REMOTE RECEIVER STATUS 0, RO Remote Receiver Status: 1 = Remote receiver is OK. 0 = Remote receiver is not OK. 11 100BASE-T FULL DUPLEX 0, RO Link Partner 1000BASE-T Full Duplex Capable: 1 = Link Partner capable of 1000Base-T Full Duplex. 0 = Link partner not capable of 1000Base-T Full Duplex. 10 1000BASE-T HALF DUPLEX 0, RO Link Partner 1000BASE-T Half Duplex Capable: 1 = Link Partner capable of 1000Base-T Half Duplex. 0 = Link partner not capable of 1000Base-T Half Duplex. 9:8 RESERVED 00, RO RESERVED by IEEE: Writes ignored, read as 0. 7:0 IDLE ERROR COUNTER 0000 0000, RO, 1000BASE-T Idle Error Counter COR 9.6.12 Extended Register Addressing REGCR (0x000D) and ADDAR (0x000E) allow read/write access to the extended register set (addresses above 0x001F) using indirect addressing. • REGCR [15:14] = 00: A write to ADDAR modifies the extended register set address register. This address register must be initialized in order to access any of the registers within the extended register set. • •REGCR [15:14] = 01: A read/write to ADDAR operates on the register within the extended register set selected (pointed to) by the value in the address register. The address register contents (pointer) remain unchanged. • REGCR [15:14] = 10: A read/write to ADDAR operates on the register within the extended register set selected (pointed to) by the value in the address register. After that access is complete, for both reads and writes, the value in the address register is incremented. • REGCR [15:14] = 11: A read/write to ADDAR operates on the register within the extended register set selected (pointed to) by the value in the address register. After that access is complete, for write accesses only, the value in the address register is incremented. For read accesses, the value of the address register remains unchanged. Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 57 |
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