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DP83867CS Datasheet(PDF) 65 Page - Texas Instruments |
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DP83867CS Datasheet(HTML) 65 Page - Texas Instruments |
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65 / 114 page ![]() DP83867CS, DP83867IS, DP83867E www.ti.com SNLS504 – OCTOBER 2015 9.6.17 Interrupt Status Register (ISR) This register contains event status for the interrupt function. If an event has occurred since the last read of this register, the corresponding status bit will be set. If the corresponding enable bit in the register is set, an interrupt will be generated if the event occurs. The ICR register controls must also be set to allow interrupts. The status indications in this register will be set even if the interrupt is not enabled. Table 28. Interrupt Status Register (ISR), Address 0x0013 BIT BIT NAME DEFAULT DESCRIPTION 15 AUTONEG_ERR_INT 0, RO, LH, COR Auto-Negotiation Error Interrupt: 1 = Auto-Negotiation Error interrupt is pending and is cleared by the current read. 0 = No Auto-Negotiation Error interrupt. 14 SPEED_CHNG_INT 0, RO, LH, COR Speed Change Interrupt: 1 = Speed Change interrupt is pending and is cleared by the current read. 0 = No Speed Change interrupt. 13 DUPLEX_MODE_CHNG_INT 0, RO, LH, COR Duplex Mode Change Interrupt: 1 = Duplex Mode Change interrupt is pending and is cleared by the current read. 0 = No Duplex Mode Change interrupt. 12 PAGE_RECEIVED_INT 0, RO, LH, COR Page Received Interrupt: 1 = Page Received Interrupt is pending and is cleared by the current read. 0 = No Page Received Interrupt is pending. 11 AUTONEG_COMP_INT 0, RO, LH, COR Auto-Negotiation Complete Interrupt: 1 = Auto-Negotiation Complete Interrupt is pending and is cleared by the current read. 0 = No Auto-Negotiation Complete Interrupt is pending. 10 LINK_STATUS_CHNG_INT 0, RO, LH, COR Link Status Change Interrupt: 1 = Link Status Change interrupt is pending and is cleared by the current read. 0 = No Link Status Change interrupt is pending. 9 RESERVED 0, RO RESERVED 8 FALSE_CARRIER_INT 0, RO, LH, COR False Carrier Interrupt: 1 = False Carrier interrupt is pending and is cleared by the current read. 0 = No False Carrier interrupt is pending. 7 RESERVED 0, RO RESERVED 6 MDI_CROSSOVER_CHNG_INT 0, RO, LH, COR MDI Crossover Change Interrupt: 1 = MDI Crossover Change interrupt is pending and is cleared by the current read. 0 = No MDI Crossover Change interrupt is pending. Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 65 |
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