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MSP430F435IPZ Datasheet(PDF) 34 Page - Texas Instruments |
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MSP430F435IPZ Datasheet(HTML) 34 Page - Texas Instruments |
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34 / 85 page  MSP430x43x, MSP430x44x MIXED SIGNAL MICROCONTROLLER SLAS344A – JANUARY 2002 – REVISED FEBRUARY 2002 34 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 timer_A (three capture/compare registers) (continued) Input Divider CLK 16-Bit Timer SSEL0 SSEL1 TACLK ACLK SMCLK 0 1 2 3 RC INCLK ID1 ID0 15 0 Data 32–kHz to 8–MHz Timer Clock POR/CLR Mode Control MC1 MC0 Equ0 Carry/Zero Set_TAIFG 16-Bit Timer Capture Mode CCIS00 CCIS01 CCI0A CCI0B GND 0 1 2 3 VCC CCI0 CCM00 CCM01 Capture/Compare Register CCR0 15 0 Comparator 0 15 0 Output Unit 0 OM02 OM00 OM01 Capture EQU0 Capture/Compare Register CCR0 Timer Bus Capture Mode CCIS10 CCIS11 CCI1A CCI1B GND 0 1 2 3 VCC CCI1 CCM10 CCM11 Capture/Compare Register CCR1 15 0 Comparator 1 15 0 Output Unit 1 OM12 OM10 OM11 Capture EQU1 Capture/Compare Register CCR1 Capture Mode CCIS20 CCIS21 CCI2A CCI2B GND 0 1 2 3 VCC CCI2 CCM20 CCM21 15 0 Comparator 2 15 0 Output Unit 2 OM22 OM20 OM21 Capture EQU2 Capture/Compare Register CCR2 Out 0 Out 1 Out 2 Capture/Compare Register CCR2 P1.0/TA0 P1.2/TA1 P2.0/TA2 P1.5/TACLK/ ACLK P1.5/TACLK/ ACLK P1.0/TA0 P1.1/TA0/MCLK P1.2/TA1 CAOUT from Comparator_A P2.0/TA2 ACLK to ADC1211 Figure 6. Timer_A Configuration With Three Capture/Compare Registers (CCRs) The module uses two interrupt vectors. One individual vector is assigned to capture/compare block CCR0 and one common interrupt vector is implemented for the timer and the other two capture/compare blocks. The three interrupt events using the same vector are identified by an individual interrupt vector word. The interrupt vector word is used to add an offset to the program counter to continue the interrupt handler software on the corresponding program location. This simplifies the interrupt handler and gives each interrupt event the same overhead of five cycles in the interrupt handler. |
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